IC封装技术与制程介绍.pdf

课程主要内容 IC封装技术基础 IC封装制程 IC封装可靠性测试 先进IC封装技术IC封装技术基础3电子元器件的应用L-一QDigital Camcorder3al CameraDigital CameraPDAComputer3G CommunicatorConsumerCelluar Phone Memory Card3G SystemComputerWireless Network4电子产品的分解IC LayIC field集成电路产业链Upstream Midstream Downstream6IC封装的作用硅芯片如人的大脑:负责产生信号封装如人的身体:-直接与外界的接触-保护作用7IC封装的功能传递信号：提供与系统内部件的I/O接口分配功率:将功率传递到需要的位置传导热量：保持电子部件的温度稳定机械承载与保护元器件：维持器件的可靠性IC封装层次 1级：元器件 2级：PCB,板卡 3级：系统主板IC封装层次IC封装分类羟品摩.用DRAM,SRAMSRAM.ROM.EPRCKf EEPROM.FCASHMicrcprocessoxMicrcprocessotLine aiXogic.DRAMSRAMMicropt ocessot晶片组圄晶片LCD高速DRAM超期晶片IC封装类型根据贴装方法区分-Through hole插入型（早期封装类型）SIP,ZIP,DIPIIITIT-Surface mount表面贴转型 SOP,QFP,BGA,CSPPCB12IC封装类型按照封装材料区分-塑料封装消费电子，占整体封装的90%-陶瓷封装散热性好，气密性封装，价格高-金属封装（军用）TO-5 and TO-39 Metal Can插入型封装器件Any semiconductor device that needs PCB insertion during mounting.IllIIIaj0s02Through Hole Package1DIP(Qu&ln*lino Package)oSH DIP(Shrink DIP)SK-DIP,SL-DIP(Skinny DIP.Slim DIP|SIP(Sing In-line Package)ZIP(Zigzag In-line Package)PGA(Pin Grid Array)or Column Pukagc1 一 IIIMIT14表面贴装型封装器件Any semiconductor device that can be soldered directly on PCB surface without inserting a lead through the PCB.PCBPCBSurface Mounted Packagecsp(Chip Scale Package)TAB(Tape Automated Bonding)15金属管壳型封装Through hole packageSolder dip or gold plate lead HnishSteel baseCompression glass seal陶瓷封装(Sn Plating)17陶瓷封装CPGAThrough hole package Straight lead configuration Gold plate lead finish8塑料封装DIP(Dual In-line Package)Epoxy NovalacMolding CompoundSilver SpotPlatingEpoxy ResinCHIPAu WIRELEAD(Pb/Sn PLATING)塑料封装QFPBGA封装塑料封装BGA22CSP(Chip Scale Package)CSP:封装尺寸L2芯片尺寸CSP(Chip Scale Package)Lead Frame CSP(leadless example)Rigid Laminate CSP(flip chip example)Silicon Based CSP(redistribution example)Flexible Laminate CSP(compliant pBGA#example)IC封装制程（塑料封装）封装结构与材料硅芯片 芯片支撑：框架，PCB基板 芯片黏贴：银胶，锡铅焊料 电信号分配与引出：金线，铝线 封装体的保护：塑料塑封，陶瓷塑封Au WireResinSubstrateLaud padDie bond adhesive26封装结构示例win!CompoundLriulfnamrET SE Detector I I-WO：1&7723 mm 2 mm SM：FIELD半导体封装工艺流程晶圆(wafe r)的制造晶圆的制造WAFERMASKING晶片背磨工作台仅在指示有品觊期间才旋转on31晶片背金处理目的：提高导电性TitaniumNickel Silver晶片点测目的：初步筛选出好的芯片Ink bad dice outSource/Emitter ProbeGate/Base Probe33功山光13d rllBwafer holderwafer tapeunsawn wafersawn wafer晶片切割Wafer sawing is to separate the dice in wafer into individual chips晶片切割焊片工艺而 EosrITTTT TTTTCu LeadframeDie Attach MaterialDie or Microchip皿皿DUTTTT TTTT 1111136焊片工艺芯片焊到框架的焊盘上银胶焊片工艺38银胶焊片工艺SYRINGEEPOXYDIEFLAT FACECOLLETNOZZLESLEADFRAME w/PLATINGD/A TRACK39银胶焊片工艺D/A TRACKD/A TRACK共晶焊片工艺-CAVITY COLLET-DIE w/BACKMETALLEADFRAME w/PLATINGHEATER BLOCK锡铅焊片工艺SOFT SOLDER WIRE焊线工艺焊线工艺Wire bonded unit焊线工艺CERAMICCAPILLARYAu BALLHEATER BLOCKDIE BONDED LEADFRAME热声波焊线工艺毛细管 r.!I压力与超 音波能埴工具向上移并 馈入更多的第 线 1型上之 接合球(6)超声波焊线工艺导线架(4)BALL BOND(1ST bond)48塑封工艺固ffEMC移送成型-Transfer MoldingTransfer molding 方法:MOLD覆肛之ENCt?也/2 Mold半成品置入境具中(1)半，Leadframe 牛伐品产 成型慎14i h.一(3)帽!工油好勺口5 口闲牛下，!惧汁苦 治融hunger加肥材tl流入住H中甘二飙化9220秒 微模就瀛出成品，完成丰，牛 成忸探:COMPOUND PELLETS塑封工艺Transfer PotOGate Runner 一、/IC and LeadHeating Rods FrameEpoxy Molding Compound Pellet 70-80%silica filler SMT(Grid An ay)FC BCA，Aia pscka,。Whafs New?.3D Packaging?0R?vaopcuVLSILSI(-7=u一W 二封装类型的生命周期SOD-123SOT-23TSSOPQFPSC-59S0IC-8PGASOT-963WL-CSPSiP/3D PackageDPAKTO-92 Metal Cans过时与淘汰阶段 下降阶段成熟阶段成长阶段引入阶段95先进封装技术 WL-CSP MCM SiP MEMS PackagingWL-CSPConventional chip lever packaging-Wafer passivation 今 wafer testing 9 wafer sorting 9 wafer sawing 今 packaging ProductWafer level packaging-Wafer passivation&patterned(bonding pad)9 packaging on the wafer(e.g.re-distribution of leads)9 Formation of solder bump-wafer sawing-ProductWLCSP工艺流程98WL-CSPWafer Level PackagingOne of the fastest growing packaging architecturesa WLP offers portable consumer products:inherent lower cost improved electrical performance lower power requirements Smaller sizeSeveral architectural variations are in use todayIP2 xnbedded dMon rubmaie3uiid-op wiib m侬 tjouEh ewg level obrxxnoDTim Chip 匕理管Hion in：3eddec device inpclynar ttelecnic)eeibedded Wife Level 3all Gnd ArrayMCM(Multi-Chip-Module)Advanced modiflcation of hybrid circuit technologies to obtain higher density,better high frequency performance,better thermal performanceSiP(System In Package)Put 3-5 chips(e.g.digital,analog)into one package Advantages:-All chips are fabricated respectively with perfect performance-Most of chips are outsourced 9 shorten design period 9 rapid marketing response-Maturity of techniques on CSP and BGA-most of chips have been tested before packaging 9 high packaging yield 9 low cost-Interconnect can be distributed by mult-layer substrateSiP(System In Package)MCM is simply put multi chips into one packaging to get additive value SiP:through packaging to get a system level product with whole interconnects,functions and performance parameters102SiP封装技术SiP:Multi-level System IntegrationSiP may include SoC and other traditional packagesPackages may include:Sub-system packagesStacked thin packages including WLP,passives and active chips-Mechanical,optical and other non electrical functions今 Complete systems or sub-systems with embedded components 今 Bare die先进封装技术3D Stacked Die PackageElpida(Poly-Si TSV)MEMS封装More complex and special requirement on packaging-Special signal interface(electrical,optical,magnetic,mechanical,thermal-)-Special requirement on outer shell-Special 3D structure-Special requirement on chip passivation-Special requirement on reliabilityMEMS封装SiSonic SP0103N Height=1.45 mm6J5n)m3.76mmPassive Active MEMSfilter circuit diaphragmMEMS silicon dophrafm 0 5 mm dameter,1um thick gapCommercial MEMS microphone:Knowles SiSonic SP0103N Source:Mark BachmanWafer Level MEMS 封装先进封装的关键技术Cavity Glass waferniniuiiniii/CISSolder bumpWafer thinningRDL(Re-Distribution of Leads)TSV(Through silicon via)BumpingWafer dicingc/Toieia