数字集成电路英文课件：Chapter 1 Deep Submicron Digital IC Design.ppt

,单击此处编辑母版文本样式,第二级,第三级,第四级,第五级,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,*,单击此处编辑母版标题样式,*,Chapter 1:Deep Submicron Digital IC Design,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,2,Outline,Kids Today!Engineer Tomorrow?,Introduction,VLSI Design,The Challenges Ahead,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,3,1.0,Kids Today!Engineer Tomorrow?,-1 ISSCC 2009,US Engineering Degrees,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,4,1.0,Kids Today!Engineer Tomorrow?,-2 ISSCC 2009,Do You Like to be an Engineer?,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,5,1.0,Kids Today!Engineer Tomorrow?,-3 ISSCC 2009,Percent.of Women Studying Engineer,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,6,1.0,Kids Today!Engineer Tomorrow?,-4 ISSCC 2009,Public Perception of Engineering,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,7,1.0,Kids Today!Engineer Tomorrow?,-5 ISSCC 2009,New Engineer Messages:,Live your life,love what you do:,Engineering will challenge you to turns dreams into realities while working with inspiring people.,Creativity has its rewards:,Engineering are respected,recognized and financially rewarded for their innovative thinking and creativity.,Make a world of difference:,Engineering are going where there is the greatest need and making a lasting contribution.,Create possibilities:,Engineering opens all kinds of doors,from humanitarian work to international business.,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,8,1.1 Introduction-1 The First Computer,The Babbage Difference Engine 2500 parts(1832),at The London Science Museums difference engine,Fully operational difference engine No.2 at the Computer History Museum in Mountain View,CA,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,9,1.1 Introduction-2 Mechanical Alternative to Electronics,1989,Doron Swade“The calculating section of Difference Engine No.2,has 4,000 moving parts(excluding the printing mechanism)and weighs 2.6 tons.It is 7 feet high,11 feet long and 18 inches in depth”,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,10,1.1 Introduction-3 Why Integrated Circuit,Break this question into two questions,Why electronics,Why use ICs to build electronics,Why use electronics,Electrons are easy to move/control,Easier to move/control electrons than real stuff,Move information,not things(phone,fax,WWW,etc.),Takes much less energy and$,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,11,1.1 Introduction-4 ENIAC,Electronic Numerical Integrator And Computer,First electronic computer 18000 vacuum tubes,680 ft,3,(63m,2,),150kW,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,12,1.1 Introduction-5 From Tubes,1946,ENIAC filled an entire room!,17,468 vacuum tubes,70,000 resistors,72,000 crystal diodes,10,000 capacitors,6,000 manual switches,5 million hand-soldered joints and many blinking lights!,could add 5,000 numbers ina single second,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,13,1.1 Introduction-6,To Transistors,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,14,1.1 Introduction-7,TX-0(MIT)and the Transistor 1,1953,TX-0,Massachusetts Institute of Technology(MIT),Lincoln Labs.,Circuit module from the TX-2,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,15,1.1 Introduction-8,What is IC(Integrated Circuit)?,Definition,：,An IC,sometimes called a chip,is a piece of a semiconductor wafer(called a die)with package,on which many tiny resistors,capacitors,and transistors are fabricated.,Number of process steps is independent of circuit complexity,Suitable for mass production,12 inch wafer,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,16,1.1 Introduction-9:Integrated Circuits,A device with multiple electrical components and their interconnects manufactured on a single substrate,Classification,Analog,Digital,Mixed Signal,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,17,1.1 Introduction-10:First IC,1952,the idea of the IC was conceived by W.A.Dummer,a radar scientist working for the Royal Radar Establishment of the British Ministry of Defense.But he unsuccessfully attempted to build such a circuit in 1956.,1958,Jack Kilby,(2000 Nobile prize),Texas Instruments,Kilbys chip was made of germanium,&1959,Robert Noyce,Fairchild Semiconductor,Noyces chip was made of silicon,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,18,1.1 Introduction-11:,First Commercial IC,1961,the First planar IC,Fairchild,1967,the First IC made with computer-aided design,Fairchild,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,19,1.1 Introduction-12:,First Microprocessor,1971,4-bit CPU,Intel 4044,2300 MOS Trans.,1 MHz clock rate,US$400 on eBay on 2004,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,20,1.1 Introduction-13:Intel 45nm Nehalem CPU,2007,4-core CPU,731 millions MOS Trans.,3.6G Hz clock,US$300-1000,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,21,1.1 Introduction-14:Intel 32nm Westmere CPU,2010,6-core CPU,1170 millions,MOS Trans.,3.33GHz clock,US$999,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,22,1.1 Introduction-15:Electronics&IC,Building electronics:,Started with tubes,then miniature tubes,Transistors,then miniature transistors,Components were getting cheaper,but:,There is a minimum cost of a component(storage,handling),Total system cost was proportional to complexity,Integrated circuits changed that:,Printed a circuit,like you print a picture,Create components in parallel,Cost no longer depended on#of devices,What happens as resolution goes up?,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,23,1.1 Introduction-16:Moores Law,Intels co-founder Gordon Moore(Retired chairman and CEO of Intel Corporation,Net worth:$3.7 billion,2008)notices in 1964,#of transistors per chip doubled every 12 months,Slow down in the 1980s to every 18 months,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,24,1.1 Introduction-17:Other Product with Same Trend,DSC pixels,PC har,d,disk capacity,RAM Storage capacity,Network capacity,Power consumption,Computing performance per unit cost,Density at minimum cost per transistor,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,25,1.1 Introduction-18:,CPU Transistor#vs.Feature Size,Transistor dimensions scale to improve performance,reduce power and reduce cost per transistor,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,26,1.1 Introduction-19:PC platform Comparison,Modern microprocessors integrate many of the separate system components from past platforms,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,27,1.1 Introduction-20:Intel 386,TM,vs.Nehalem,Transistor Count:280 thousand731 million,Frequency:16MHz3.6GHz,#Cores:1 4,Cache Size:None 8MB,I/O Peak Bandwidth:64MB/sec50GB/sec,Adaptive Circuits:NoneSleep Mode,Turbo Mode,Power Gating,Adaptive Frequency Clocking,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,28,1.1 Introduction-21:System Integration Trend,System integration needed for performance,power,form factor Challenge is to integrate wider range of heterogeneous elements,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,29,1.1 Introduction-22:The IC(1961)vs.IBM IC(1999),Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,30,1.1 Introduction-23:1 wafer-1964 vs 12 wafer-2003,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,31,1.1 Introduction-24:Technology Scaling,Year,Dimensions scale down by 30%Doubles transistor density,Oxide thickness scales down,Faster transistor,high performance,Vdd&Vt scalingLower active power,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,32,1.1 Introduction-25:Technology Scaling,Technology shrinks by 0.7 per generation,With every generation can integrate 2x more functions on a chip;chip cost does not increase significantly,Cost of a function decreases by 2x,But,How to design chips with more and more functions?,Design engineering population does not double every two years,Hence,a need for more efficient design methods,Exploit different levels of abstraction,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,33,1.1 Introduction-26:Energy per Logic Operation,Energy per logic operation scaling will slow down,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,34,1.1 Introduction-27:Moores Law in Microprocessors,Transistors on lead microprocessors double every 2 years,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,35,1.1 Introduction-28:Evolution in DRAM Chip Capacity,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,36,1.1 Introduction-29:Die Size Growth,Die size grows by 14%to satisfy Moores Law,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,37,1.1 Introduction-30:Clock Frequency,Lead microprocessors frequency doubles every 2 years,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,38,1.1 Introduction-31:Power Dissipation,Lead Microprocessors power continues to increase,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,39,1.1 Introduction-32:Power Density,Power density too high to keep junctions at low temperature,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,40,1.1 Introduction-33:#of Transistors per Die,Source:ISSCC 2003 G.Moore“No exponential is forever,but forever can be delayed”,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,41,1.1 Introduction-34:Design Productivity Trends,Complexity outpaces design productivity,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,42,1.1 Introduction-35:Exponential Costs,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,43,1.1 Introduction-36:Average Transistor Price by Year,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,44,1.1 Introduction-37:Organic vs.Electronic Evolution,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,45,1.1 Introduction-38:Organic vs.Electronic Evolution,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,46,1.1 Introduction-39:More Moore&More than Moore,2007,Seventh Framework Program(2007-2013)of the European Community,ICT:,“More Moore”targets nanoelectronics devices beyond 32 nm,Specific issues are the increasing process variability and expected physical and reliability limitations of devices and interconnects as well as the need for new circuit architectures and characterization methods and techniques.,More than Moore targets heterogeneous System-on-Chip(SOC),Integration and miniaturization technologies,Design technologies,Manufacturing technologies,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,47,1.1 Introduction-40:The End of Scaling is Near?,“Optical lithography will reach its limits in the range of 0.75-0.50 microns”,“Minimum geometries will saturate in the range of 0.3 to 0.5 microns”,“X-ray lithography will be needed below 1 micron”,“Minimum gate oxide thickness is limited to 2 nm”,“Copper interconnects will never work”,“Scaling will end in 10 years”,Perceived barriers are meant to be surmounted,circumvented or tunneled through,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,48,1.2 VLSI Design-1 Levels of Design Abstraction,Have different levels of details,Top Level is your goal,Initially not executable,Often becomes C+code,Then create microArch,Rough hardware resources,Rough communication,Can be executable,Functional Model,Design is never top down or bottom up.It is really iterations to match the constraints on both ends:hardware and spec.,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,49,1.2 VLSI Design-2 VLSI Design Flow,Almost all designs use a cell based design flow,Most of the low level layout has been done already,Layout for logic gates/flops exists in std cells,Memories are also done by generators,Can have larger functions completed as well,Can be laid out as a large cell(hard macro),Can be given to you as a collection of std cells(soft macro),Sometimes there is a need to create some custom cells,Create std cell library,Could be for some mixed signal(analog circuits),Or for some special function blocks that are critical,These cells follow a“full custom flow”,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,50,1.2 VLSI Design-3 Full Custom Design Flow,Gives the designer the most freedom,Lots of rope,Can be clever,Can hang yourselves too,For a specific function,Can achieve best performance,Speed,power,area,etc,Most work/time per function,Optimizations are at a low level,Circuit better be important,Think assembler,only worse,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,51,1.2 VLSI Design-4 Schematic Capture/Simulation,Circuit drawn many levels,Transistor,gate,and block,Uses hierarchy,Blocks inside other blocks,Allows reuse of designs,Tool create simulation netlists,Components and all connections,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,52,1.2 VLSI Design-5 Layout,Draw and place transistors for all devices in schematic,Rearrange transistors to minimize interconnect length,Connect all devices with routing layers,Possible to place blocks within other blocks,Layout hierarchy should match schematic hierarchy,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,53,1.2 VLSI Design-6 Design Rule Checking(DRC),Fab has rules for the polygons,Required for manufacturability,DRC checker looks for errors,Width,Space,Enclosure,Overlap,Lots of complex stuff(more later),Violations flagged for later fixup,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,54,1.2 VLSI Design-7 Layout versus Schematic(LVS),Extracts netlist from layout by analyzing polygon overlaps,Compare extracted netlist with original schematic netlist,When discrepancies occur,tries to narrow down location,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,55,1.2 VLSI Design-8 Layout Parasitic Extraction(LPE),Estimates capacitance between structures in the layout,Calculates resistance of wires,Output is either a simulation netlist or a file of interblock delays,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,56,1.2 VLSI Design-9 Cell Based Design Flow(ASIC Flow),Separate teams to design and verify,Physical design is(semi-)automated,Loops to get device operating frequency correct can be troubling,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,57,1.2 VLSI Design-10 Logic synthesis,Changes cloud of combinational functionality into standard cells(gates)from fab-specific library,Chooses standard cell flip-flop/latches for timing statements,Attempts to minimize delay and area of resulting logic,Digital Integrated Circuits,Faculty of Materials and Energy,GDUT,58,1.2 VLSI Design-11,