收藏 分销(赏)

射频电路测试原理_第二讲_混合信号测试原理_ADC与DAC测试方法 英文版_清华大学_140页.pdf

上传人:wei****ing 文档编号:5865256 上传时间:2024-11-21 格式:PDF 页数:140 大小:885.66KB
下载 相关 举报
射频电路测试原理_第二讲_混合信号测试原理_ADC与DAC测试方法 英文版_清华大学_140页.pdf_第1页
第1页 / 共140页
射频电路测试原理_第二讲_混合信号测试原理_ADC与DAC测试方法 英文版_清华大学_140页.pdf_第2页
第2页 / 共140页
射频电路测试原理_第二讲_混合信号测试原理_ADC与DAC测试方法 英文版_清华大学_140页.pdf_第3页
第3页 / 共140页
射频电路测试原理_第二讲_混合信号测试原理_ADC与DAC测试方法 英文版_清华大学_140页.pdf_第4页
第4页 / 共140页
射频电路测试原理_第二讲_混合信号测试原理_ADC与DAC测试方法 英文版_清华大学_140页.pdf_第5页
第5页 / 共140页
点击查看更多>>
资源描述

1、Basic Fundamental for Radio Frequency Circuits TestingLecture 2 Mixed Signal TestADC and DAC testguolinli射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期2Reference?Mark Baker,Demystifying Mixed-Signal Test Methods,Elsevier Science,2003?Mark Burns,Gordon W.Roberts,An Introduction to Mixed-Signal IC Test and Measureme

2、nt,Oxford University Press,2001?Michael L.bushnell,Vishwani D.Agrawal,Essentials of Electronic Testing for Digital,Memory and Mixed-Signal VLSI Circuits,Kluwer Academic Publishers,London,2002?陈光禹,王厚军,田书林,李为民,现代测试技术现代测试技术,电子科技大学出版社,2002?董在望主编,通信电路原理通信电路原理,第二版,高等教育出版社,2002射频电路测试原理清华大学电子工程系李国林雷有华2005春季

3、学期3?Mark Baker,Demystifying Mixed-Signal Test Methods,Elsevier Science,2003contents?I.What is Mixed Signal?II.Mixed Signal Test Parameters?III.Signal Generation?IV.Signal Capture?V.Fast Fourier Transform?VI.Testing Digital-to-Analog Converters?VII.Testing Analog-to-Digital Converters内容并不限于混合信号系统测试,而

4、是一般芯片或模块测试的全过程,只是以ADC和DAC为例说明芯片外特性测试的全过程。本章更多地是讲测试中的数据处理方法,间或涉及到测试电路射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期4I.What is Mixed Signal?Music CD?Analog information is processed in digital form?Modem?Digital information is processed in analog form?Mixed Signal System?Processes analog information in digital form;o

5、r?Processes digital information in analog form;or?Both?Mixed Signal Device?Operates across digital and analog domains by representing or processing either analog or digital information in either analog or digital form射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期5Glossary?ATE:Automatic Test Equipment?DDS:Direct Di

6、gital Synthesis?DNL/INL:Differential/Integral Non-Linearity?DUT:Device under Test?IIH/IIL/IOH/IOL?RMS:Root Mean Square?SFDR:Spurious Free Dynamic Range?SNR:Signal to Noise Ratio?SINAD:Signal to Noise and Distortion Ratio?THD:Total Harmonic Distortion?LSB:Least Significant Bit射频电路测试原理清华大学电子工程系李国林雷有华2

7、005春季学期6Mixed Signal Test SystemAnalogSequenceDACDUTCaptureDataADCDSPDigital PatternComparePass/FailPass/FailDigital LogicDigitized AnalogTimingDriverReceiver射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期7II.Mixed Signal Test Parameters?A large portion of mixed signal testing focuses on signal analysis?The procedu

8、re for signal analysis is simple?Apply the condition?Make some measurements?And perform some calculations?What are you going to measure?How can you determine if a mixed signal device is operating according to specification?We are looking for signal characteristic values,or the results of the analysi

9、s,to be within a certain range?Well say it passes the test射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期8Signal Analysis Categories?In general,signal analysis falls within one or more of two distinct categories?DC,AC(Time Domain,and Frequency Domain)?DC:Direct Current signal analysis is used to determine the stati

10、c or quiescent characteristics of the device?Such as supply current or output pin voltage levels?AC:Time Domain signal analysis applies to transient or dynamic signal characteristics or frequency domain signal analysis(FFT)?Typical time domain specifications include slew rate and settling time?Typic

11、al frequency domain specifications include noise and distortion射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期9An Example:Programmable Gain AmplifierinAoutAOVRGNDDDVEEV0D1D2DAnalog Input12V12VAnalog OutputOver-Limit Digital Output(Logic high while output level exceeds 10volts)Gain Set Digital Input射频电路测试原理清华大学电子工程系

12、李国林雷有华2005春季学期10Test Plan?The test engineer creates a test plan document based on the device specification document or spec sheet?The device specification document describes the operation and electrical characteristics of the device?The order of tests is arranged in a sequence that will most quickly

13、 identify possible defects?The most basic tests are usually performed first,with the view that if the part fails the basic tests,then it is not necessary to test it any further?For Example:Defect in the power supply pin connection?An output amplitude first test will give a result of functional failu

14、re.射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期11Some Conventions?Firstly do some checking?Is the tester connected to the device?Is the power supply current within spec?IDD:If not,theres no point in going further.?Is the input pin current within spec?IIH/IIL:If the inputs do not work,nothing else will work.?If t

15、he connections,the power supply,and the inputs are within specification,then make the Functional Testing?Does the device perform the correct operational function?Can the output pin generate the correct signal with the specified current load?Are the measured time domain and frequency domain parameter

16、s within specification?DCAC射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期12Example Device DC Specification?Analog Input Pins?Leakage=1uA10V;Offset=2mV?Analog Output Pins?Maximum output voltage=10.5volts?Minimum positive output current=5mA+10volts?Minimum negative output current=-5mA-10volts?Gain Error2%?Linearity

17、ErrorV5.0=10.5V10.5VShould goes to a logic high0V射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期23Over-Range Function?The device over-range function provides an indication of an over-range condition on the amplifier output via a logic level on the OVR digital output pin?10.1V:-5mA load:3.2V?9.9V:+5mA load:0.2V?Digi

18、tal Output Pins?IOL=5mA;IOH=5mA;VOL=0.2volts;VOH=3.2volts?Threshold=10volts/0.1Volts射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期24?Analog Output Pins?Gain Error2%?Linearity Error1%Gain Error Tests?The gain test evaluates the overall span of the amplifier outputvoltsInputvoltawithSpanLevelOutputIdealVlOUTPUTLeveV

19、INPUTLevelgGAINSettinVlOUTPUTLeveVINPUTLevelgGAINSettinIdeal0.7 0.1 0.8 0.1 8 0.1 0.1 1 =voltsInputvoltawithSpanLevelOutputActualVlOUTPUTLeveVINPUTLevelgGAINSettinVlOUTPUTLeveVINPUTLevelgGAINSettinActual1.7 0.1 15.8 0.1 8 05.1 0.1 1 =%42.1%1000.70.71.7=IdealIdealActual射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期

20、25?Analog Output Pins?Gain Error2%?Linearity Error1%Linearity Error Tests?Linearity error measures each gain step by changing the gain setting with a constant input voltage level.The incremental steps of the output are compared to a calculated linear straight line.Gain Step Calculated Value Measured

21、 Value Error 1 1.050 1.050 0.0%2 2.064 2.107+2.1%3 3.078 3.301-1.5%4 4.092 4.051-1.0%5 5.106 5.116+0.2%6 6.120 6.193+1.2%7 7.134 7.060-1.0%8 8.150 8.150 0.0%射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期26AC Tests?Time Domain Specifications?Slew Rate?10volts per us?Settling Time?5us?Frequency Response?100Hz to 10k

22、Hz 4dB?Frequency Domain Specifications?Harmonic Distortion?5%at 1000Hz at 1 volt?Signal to Noise?-60dB with 1000Hz reference at 1 volt射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期2711.09.0Slew Rate?Slew Rate describes the slope of a voltage change across time?The DUT is driven with a fast edge pulse,and the outpu

23、t is captured and analyzed?The slew rate is found as the slope of the transition between the rated output extremes?Sometimes the positive and negative swing will have different slew rates,in which case both positive and negative slew rates are tested射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期28Settling Time?Set

24、tling time measures the time elapsed from the application of a step input to when the amplifier output has settled to within a specified error band of the final value?Settling time includes the time needed for the DUT to slew from the initial value,recover from any overload,and settle to within a sp

25、ecified range射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期29Slew Rate and Settling Time TestinAoutAOVRGNDDDVEEV0D1D2D12V12VSignalSourceSignalCapture/Analyze射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期30?Time Domain Specifications?Frequency Response?100Hz to 10kHz 4dBFrequency Response Tests?A device may be specified to operat

26、ed over a range of signal frequencies.A frequency response test measures how the device responds to different signal frequencies across a specified range?applying a multi-tone signal,the device response to each frequency component can be evaluated by processing the device output in the frequency dom

27、ain?The device is powered up and programmed for a specific gain value?Using a set of different input signal frequency,measures the output signal amplitude.Calculate the amplitude ratio of the Max and the Min,it should be less than 4dB in a the specified frequency range from 100Hz to 10kHz.射频电路测试原理清华

28、大学电子工程系李国林雷有华2005春季学期31Distortion and Noise Testing?The test process for distortion and noise testing applies a pure sine wave to the DUT.The output of the DUT is captured and processed with a Fourier Transform.?By evaluating the frequency domain data,the amplitude of the original signal frequency c

29、an be compared with the amplitude of the signal distortion,which occurs at integer multiples of the original frequency.?Signal information that is not the original signal frequency and not an integer multiple of the original frequency is identified as noise.射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期32III.Signa

30、l Generation?Testing requires the ability to present a stimulus,measure the response,and analyze the results?The mechanism for presenting the stimulus is referred to as source?The source instrumentation on a mixed signal tester must be able to apply analog data in both analog form and digital form?D

31、DSsourceDUTcaptureanalysis射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期33Signal Source HardwareControlSource DataMemoryDACFilterAmpto DUT analog inputControlPatternMemoryTimingFormatDriverto DUT digital input射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期34Digital Source Circuit Description?Digital Signal Source?A binary represe

32、ntation of the device functional pattern is stored into test system signal source RAM.The digital signal sequence is programmed as a series of vectors.?The digital signal source memory is accessed by the sequence controller.The sequence controller looks up the command and timing information for the

33、selected vector and applies the timing information to the formatter.Formatting determines the edge placement timing within the vector cycles of the data presented to the device input pins via the pin driver.The pin driver acts as a high-speed switch that converts the formatted data into voltage leve

34、ls representing the binary signal data.射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期35Analog Source Circuit Description?Analog Signal Source?The clock is programmed to the correct sample rate and drives the sequencer and the DAC?The sequencer steps through addresses in the source memory?The source memory provides

35、 the sequence of digital samples to the DAC?The DAC circuit converts the digital samples into analog levels?The reconstruction filter smoothes the sequence of discrete analog levels into a continuous analog signal?The amplifier adjusts the level of the signal required by the DUTSequencerClockaddress

36、DataDACRecon.FilterAmpTester CPU射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期36kHzfi2=kHzfs16=32=samples4=cyclesHzfbase500=DSPs Law?Samples:sample size?Fs:sample frequency?Fi:frequency of interest?Fbase:base frequency?Cycles:number of signal cycles in the sample setHzfcyclessamplesHzfkHzfbaseis254132010258=sample

37、sffsbase=baseiffcycles=cyclessamplesffis:=?Fbase must have an integer relationship with both fs and fi for that the samples and cycles must be integers.射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期37sinx/x?The number of samples per cycle directly affects the quality of the generated signal?The process of represen

38、ting a continuous wave shape with a series of discrete steps introduces some signal amplitude degenerations?The error of the curve fit is a function of the number of samples per cycle,and can be predictedsiffxxxA2sin=9003.0sin=xxAkHzfkHzfis18=7853.02=siffx射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期38Source Filt

39、er?The reconstruction filter of the analog source hardware must be considered when choosing the optimal number of samples per cycle?The purpose of the reconstruction filter is to remove the effects of the sample clock,and the DAC step rate?Typical reconstruction filters are designed to attenuated th

40、e clock frequency by 24 dB for every doubling of the pass band?A 24dB per octave reconstruction filer with a 1kHz pass band will attenuate a 4kHz clock by only 48dB.?Inadequate number of samples per cycle will cause distortion in output signal射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期39IV.Signal Capture?A mixe

41、d signal device may generate analog information in either analog or digital form,which in turn is captured by the ATE systems signal capture instruments?The contents of the signal capture memory represent a digitized analog signal,not digital logic states?Instead of comparing the captured digitized

42、signal with a pattern,the signal data is analyzed by a digital signal processor(DSP)?The DSP analyzes the signal data to extract analog signal information,such as peak,RMS,signal-to-noise,and harmonic distortion射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期40Digital Signal Capture HardwareSequencerTiming setinform

43、ationFormat,TimingCaptureMemoryDSPDUTDigitizedAnalogOutputVOHLogicStateDecoderStrobeVOLLogic AnalyzerPC ProgramADC射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期41Analog Signal Capture HardwareSequencerCaptureMemoryaddressdataADCClockLP filterAmpAccuracyHighVerykHzVAccuracyHighMHzVSpeedHighMHzV 0011.020 2.11516 502

44、4412nApplicatioRate Conversion1VResolutionBitsbitsMBkB201256DSPDUTAnalogOutputSpectrum AnalyzerOscilloscopeDAC射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期42The Digitizing Process?Digitizing an analog signal represents a continuous signal with a series of discrete numeric values?To digitize means to sample and qu

45、antify?Not all data points on the continuous signal are captured?To represent a continuous signal with a series of discrete steps?The process of converting from analog to digital has several inherent constraints?Quantizing Error/LSB/Digitizer Resolution?Sample Size and Sample Rate射频电路测试原理清华大学电子工程系李国

46、林雷有华2005春季学期43Quantizing ErrorVVmVmVmVmVVV387665536166.02.14096125.19391287Error5 QuantizingLSB5Number CodeBits?When using a 16-bit capture instrument on a 5volt range,the instrument returns a reading of 38uV.This may or may not be the same as the actual signal level.Because of the limitations of th

47、e digitizer,the actual level could be anywherefrom 0 volts to 76uV-There is no way to tell without improving the instrument resolution.射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期44Sample Size and Sample Rate?The purpose of digitizing a signal is to construct a sample set that represents the signal amplitude ove

48、r time?The sample frequency is the rate at which the digitizer samples the input signal for conversion to a set of discrete numeric values?Ideally,the greater the number of samples(i.e.,the higher thesample rate)that can be taken for any given signal duration,the greater the accuracy of the digital

49、representation?However,acquiring many samples may take longer than acquiring fewer samples?Processing many samples usually takes longer than processing fewer samples?The constraints of the digitizer limit the sample frequency?The practical rule is to digitize the signal with as few samples as possib

50、le,but no fewer射频电路测试原理清华大学电子工程系李国林雷有华2005春季学期45Nyquist and ShannonO()fFmaxfmaxfsff?Nyquist Sampling Limit?The sampling frequency must be greater than twice the bandwidth of the signal?Shannons Theorem?IF a signal over a given period of time contains no frequency components greater than fx,then all

展开阅读全文
部分上传会员的收益排行 01、路***(¥15400+),02、曲****(¥15300+),
03、wei****016(¥13200+),04、大***流(¥12600+),
05、Fis****915(¥4200+),06、h****i(¥4100+),
07、Q**(¥3400+),08、自******点(¥2400+),
09、h*****x(¥1400+),10、c****e(¥1100+),
11、be*****ha(¥800+),12、13********8(¥800+)。
相似文档                                   自信AI助手自信AI助手
搜索标签

当前位置:首页 > 教育专区 > 其他

移动网页_全站_页脚广告1

关于我们      便捷服务       自信AI       AI导航        获赠5币

©2010-2024 宁波自信网络信息技术有限公司  版权所有

客服电话:4008-655-100  投诉/维权电话:4009-655-100

gongan.png浙公网安备33021202000488号   

icp.png浙ICP备2021020529号-1  |  浙B2-20240490  

关注我们 :gzh.png    weibo.png    LOFTER.png 

客服