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Click to edit Master title style,Click to edit Master text styles,Second level,Third level,Fourth level,Fifth level,*,*,*,Chapter 4Wafer Manufacturing and Epitaxy Growing,2025/5/26,1,Crystal Structures,Amorphous,No repeated structure at all,Polycrystalline,Some repeated structures,Single crystal,One repeated structure,2025/5/26,2,Amorphous Structure,2025/5/26,3,Polycrystalline Structure,Grain,Grain Boundary,2025/5/26,4,Single Crystal Structure,2025/5/26,5,Why Silicon?,Abundant,cheap,Silicon dioxide is very stable,strong dielectric,and it is easy to grow in thermal process.,Large band gap,wide operation temperature range.,2025/5/26,6,Source:,2025/5/26,7,Unit Cell of Single Crystal Silicon,2025/5/26,8,Crystal Orientations:,x,y,z,plane,2025/5/26,9,Crystal Orientations:,x,y,z,plane,plane,2025/5/26,10,Crystal Orientations:,x,y,z,plane,2025/5/26,11,Orientation Plane,Atom,Basic lattice cell,2025/5/26,12,Orientation Plane,Silicon atom,Basic lattice cell,2025/5/26,13,Illustration of the Point Defects,Silicon Atom,Impurity on substitutional site,Frenkel Defect,Vacancy(,空位),or Schottky Defect,Impurity in Interstitial Site,Silicon Interstitial,間隙,2025/5/26,14,Dislocation,Defects,2025/5/26,15,From Sand to Wafer,Quartz sand:silicon dioxide,Sand to metallic grade silicon(MGS),React MGS powder with HCl to form TCS,Purify TCS by vaporization and condensation,React TCS to H,2,to form polysilicon(EGS),Melt EGS and pull single crystal ingot,2025/5/26,16,From Sand to Wafer(cont.),Cut end,polish side,and make notch or flat,Saw ingot into wafers,Edge rounding,lap,wet etch,and CMP,Laser scribe,Epitaxy deposition,2025/5/26,17,晶圓形成之步驟,From Sand to Silicon,Heat(2023,C),SiO,2,+,2,C,Si +2CO,Sand Carbon MGS Carbon Dioxide,MGS(poly-silicon)with 98%purity,(1),首先由石英砂提煉成冶金級多晶矽,2025/5/26,18,Silicon Purification I,Si+HCl,TCS(vapor),Silicon Powder,Hydrochloride,Filters,Condenser,Purifier,Pure TCS(liquid)with 99.9999999%,Reactor,300,C,2025/5/26,19,Polysilicon Deposition,EGS,Heat(1100,C),SiHCl,3,+,H,2,Si +3HCl,TCS(liquid)Hydrogen EGS Hydrochloride,EGS(Electronic-grade Silicon)is also poly-silicon,2025/5/26,20,Silicon Purification II,Liquid TCS,H,2,Carrier gas bubbles,H,2,and TCS,Process Chamber,TCS+H,2,EGS+HCl,EGS,2025/5/26,21,Electronic Grade Silicon,2025/5/26,22,Crystal Pulling,Make a single-crystal silicon ingot,Czochralski(CZ)method,Floating Zone(FZ)method,2025/5/26,23,Crystal Pulling:CZ method,Graphite Crucible,Single Crystal silicon Ingot,Single Crystal Silicon Seed,Quartz Crucible,Heating Coils,1415 C,Molten Silicon,2025/5/26,24,CZ Crystal Pullers,Mitsubish Materials Silicon,2025/5/26,25,CZ Crystal Pulling,2025/5/26,26,Floating Zone Method,Heating Coils,Poly Si Rod,Single Crystal Silicon,Seed Crystal,Heating Coils Movement,Molten Silicon,2025/5/26,27,Comparison of the Two Methods,CZ method is more popular,Cheaper,Larger wafer size(300 mm in production),Reusable materials,Floating Zone,Pure silicon crystal(no crucible),More expensive,smaller wafer size(150 mm),Mainly for power devices.,2025/5/26,28,Ingot Polishing,Flat,or Notch,Flat,150 mm and smaller,Notch,200 mm and larger,2025/5/26,29,Wafer Sawing,Orientation Notch,Crystal Ingot,Saw Blade,Diamond Coating,Coolant,Ingot Movement,2025/5/26,30,Parameters of Silicon Wafer,Wafer Size,(,mm),Thickness,(,m,m),Area,(,cm,2,),Weight,(,grams),279,20.26,1.32,381,45.61,4.05,100,525,78.65,9.67,125,625,112.72,17.87,150,675,176.72,27.82,200,725,314.16,52,98,300,775,706.21,127.62,50.8(2,in),76.2(3,in),2025/5/26,31,Wafer Edge Rounding(,邊緣圓滑化),Wafer,Wafer movement,Wafer Before Edge Rounding,Wafer After Edge Rounding,2025/5/26,32,Wafer Lapping,(粗磨拋光),Rough polished,conventional,abrasive,slurry-lapping,To remove majority of surface damage,To create a flat surface,2025/5/26,33,Wet Etch,Remove defects from wafer surface,4:1:3 mixture of HNO,3,(79 wt%in H,2,O),HF(49 wt%in H,2,O),and pure CH,3,COOH.,Chemical reaction:,3 Si+4 HNO,3,+18 HF,3 H,2,SiF,6,+4 NO+8 H,2,O,2025/5/26,34,Chemical Mechanical Polishing(CMP),Slurry,Polishing Pad,Pressure,Wafer Holder,Wafer,2025/5/26,35,200 mm Wafer Thickness and Surface Roughness Changes,76,m,m,914,m,m,After Wafer Sawing,After Edge Rounding,76,m,m,914,m,m,12.5,m,m,814,m,m,1000,C,N,2,can react with silicon,SiN on wafer surface affects epi deposition,H,2,is used for epitaxy chamber purge,Clean wafer surface by hydrides formation,2025/5/26,55,Properties of Hydrogen,2025/5/26,56,Defects in Epitaxy Layer,Dislocation,Stacking Fault from Surface Nucleation,Impurity Particle,Hillock,Stacking Fault form Substrate Stacking Fault,After S.M.Zses,VLSI Technology,Substrate,Epi Layer,2025/5/26,57,Future Trends,Larger wafer size,Single wafer epitaxial grow,Low temperature epitaxy,Ultra high vacuum(UHV,to 10,-9,Torr),Selective epitaxy,2025/5/26,58,Summary,Silicon is abundant,cheap and has strong,stable and easy grown oxide.,and,CZ and floating zone,CZ is more popular,Sawing,edging,lapping,etching and CMP,2025/5/26,59,Summary,Epitaxy:single crystal on single crystal,Needed for bipolar and high performance CMOS,DRAM.,Silane,DCS,TCS as silicon precursors,B,2,H,6,as P-type dopant,PH,3,and AsH,3,as N-type dopants,Batch and single wafer systems,2025/5/26,60,
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