VHDL十字路口交通灯.doc

library ieee;use ieee.std_logic_1164.all;use ieee.std_logic_unsigned.all;entity jiaotongdeng is port( clk_in:in std_logic; rst:in std_logic; light:out std_logic_vector(7 downto 0); zhug:out STD_LOGIC_VECTOR(6 downto 0); zhus:out STD_LOGIC_VECTOR(6 downto 0); zhig:out STD_LOGIC_VECTOR(6 downto 0); zhis:out STD_LOGIC_VECTOR(6 downto 0);end jiaotongdeng;architecture a of jiaotongdeng is type states is(green_red,yellow_red,red_green,red_yellow); signal state:states:=green_red; signal nextstate:states:=green_red; signal dzhig:integer range 0 to 9; signal dzhis:integer range 0 to 3; signal dzhug:integer range 0 to 9; signal dzhus:integer range 0 to 2; signal clock_buffer:std_logic; signal count_time:integer range 0 to 1999999; signal clk:std_logic; signal seczhig:integer range 0 to 9 ; signal seczhis:integer range 0 to 3 ;signal seczhug:integer range 0 to 9 ; signal seczhus:integer range 0 to 2 ;beginfrequent:process(clk_in) begin if clk_inevent and clk_in=1 then if count_time=1999999 then count_time=0; clock_buffer=not clock_buffer; else count_time=count_time+1; end if; end if; clk=clock_buffer; end process;light_statment:process(rst,state) beginif rst=0 then light=11011011;NEXTSTATE light=11011011; nextstate=yellow_red; dzhus=0; dzhug=4; dzhis=0; dzhig light=10111011; nextstate=red_green; dzhus=2; dzhug=4; dzhis=1; dzhiglight=01111110; nextstate=red_yellow; dzhus=0; dzhug=4; dzhis=0; dzhiglight=01111101; nextstate=green_red; dzhus=2; dzhug=9; dzhis=3; dzhig=4; end case; end if;end process;time:process(rst,clk) begin if rst =0then seczhus=2;seczhug=9;seczhis=3;seczhig=4;STATE=GREEN_RED;else if (rising_edge(clk)then if(seczhus=0 and seczhug=0 ) or (seczhis=0 and seczhig=0 )then state=nextstate; seczhus=dzhus; seczhug=dzhug; seczhis=dzhis; seczhig=dzhig; else if(seczhus /= 0 and seczhug=0 ) and (seczhis /= 0 and seczhig=0 )thenseczhus=seczhus-1;seczhug=9;seczhis=seczhis-1; seczhig=9;elsif(seczhis /= 0 and seczhig=0 ) then seczhis=seczhis-1;seczhig=9;seczhug=seczhug-1;elsif(seczhus /= 0 and seczhug=0 ) then seczhus=seczhus-1;seczhug=9;seczhig=seczhig-1;else seczhug=seczhug-1; seczhig zhus zhus zhus null; END case;END process;process(seczhug) begincase seczhug isWHEN 0 = zhug zhug zhug zhug zhug zhug zhug zhug zhug zhug zhig zhig zhig zhig zhig zhig zhig zhig zhig zhig zhis zhis zhis zhis = 0110000 ; -3END case;END process;end a;