一种无线数据采集和传输系统的设计外文翻译.doc

毕业设计（论文）
译文及原稿

译文题目：
一种无线数据采集和传输系统的设计

原稿题目：
The Design of a Wireless Data Acquisition and

Transmission System
原稿出处：
CAI Jun，YU Shun-Zheng，LIU Jing-li．The Design of a
Wireless Data Acquisition and Transmission System[J]．
JOURNAL OF NETWORKS．2009，4（10）：1042-1049．

浙江工业大学之江学院毕业设计（论文） 外文翻译
一种无线数据采集和传输系统的设计
【摘要】 在现代无线通信领域主要有一些技术为无线传输网络提供解决方法，例如：GSM，CDMA，3G，Wi-Fi。这些方法使得网络能够高效率和高质量的工作，但是成本很高。因此要低成本和在没有基础设施或者基础设施被破坏的情况下推广它们是很困难的。根据这种情况，本论文中数据采集和无线传输网络里的信息终端和无线收发模块的关键部件，是依据nRF905收发模块和51系列单片机的原理设计而成作为核心硬件，此外，结合目前自组无线网络的技术，可以构建一个短距离无线数据采集和传输网络，这个网络能够提供一个工作在ISM（工业科学医学）频段的低功率及高性能的数据通信系统。然后提出了一个对无线通信可行的解决方案，这个方案优势在于更强的实时响应，更高的可靠性要求和更小的数据量。通过软件和硬件的调试和实际测量，这个系统在我们的解决方案基础上运行良好，达到了预期的目标并且已经成功的应用到无线车辆系统。
【关键词】 自组网络；数据采集；传输网络
1 简介
在现代无线通信里，GSM，CDMA，3G和Wi-Fi因为其高速和可靠的质量而逐渐成为无线数据传输网络的主流解决方案。它们也有高成本的缺点，因此如果广泛的应用，将会引起大量的资源浪费，也不能在小区域，低速率的数据通信中得到提升。多点短距离无线数据采集和传输网络将成为最佳解决方案。此系统支持点对点，点对多点和多点对多点通信系统的发展。
短距离无线通信可以适应各种不同的网络技术，例如蓝牙，IEEE802.11，家庭无线网和红外。与远距离无线通信网络相比，它们的不同之处在于基本结构，应用水平，服务范围和业务（数据，语音）。设计短距离无线通信网络的最初目的是为了提供短距离宽带无线接入到移动环境或者制定临时网络，这是在移动环境里互联网更深的发展。短距离无线通信网络最主要的优势是更低的成本和更灵活的应用。
本文介绍信息终端（单个器件）的硬件和软件以及多点短距离无线数据采集和传输网络的无线接收模块的设计建议，提供一个低功率高性能的工作于ISM（工业科学医学）频段的无线数据通信系统。文章剩余部分由如下内容组成：在第二部分，我们描述了无线数据采集和传输系统的通用模块图表，第三部分，我们分析此系统硬件设计的关键技术，第四部分，介绍系统的软件设计，第五部分，展示系统的测试结果，最后我们在第六部分阐述结论和进一步的工作。
2 系统实现模型
1．系统模型
作为一个点对多点的多功能无线通信系统，它包含了一个中央监控系统和多个远程终端单元（图1）。实际上，远程终端单元是一些在移动过程中可互相通信的移动电台。另外，中央监控系统与远程终端单元进行双向通信。
在下一部分，设计信息终端和控制中心的软件和硬件上的一些关键部件。
2．相关模型
本论文中的系统是根据OSI（国际标准组织）中的OSI/RM模型里的第一层（物理层）和第二层（数据链路层）而设计的，如图2所示。物理层的功能是通过建立电路和专用芯片组完成的。然而通信协议里的数据链路层是由软件来实现的。
3 系统硬件设计
为了设计，管理和更新的方便，一些硬件单元和节点根据它们的功能和电学特性被划分成不同的模型。本设计以射频收发芯片nRF905为核心,以模块搭建设计为指导思想,搭建无线温度采集系统,系统主要由数据采集模块和无线传输模块组成。数据采集模块以数字式温度传感器DSl8B20监测温度参数,并将监测的温度参数简单处理后通过nRF905无线模块发送到接收端口。无线数据传输模块通过nRF905芯片进行数据收发处理,nRF905芯片的集成度较高,所需的外围器件较少,因此整体的电路设计相对比较简单点。本设计给出其与MSP430F449的接口电路设计和接收端通过电平转换芯片MAX3232与PC机连接。并根据硬件特性及连接设计相应的软件流程,并编写软件。通过相适应的无线传输模块和数据采集模块控制软件的操控,保证整个硬件系统的流畅运作。系统基本结构中包含无线射频收发模块，控制处理模块，通用串行接口模块，数据缓冲存储模块以及多功能电源管理模块等。
1．收发器和接收模块
在数据发送过程中，数据包将被调制到高频然后发送到目标无线射频传输模块，接收过程中，高频信号通过无线射频接收模块又被解调成原始数据包。
NRF905是无线射频收发模块的关键，它的频率是16兆赫兹的晶体振荡器。NRF905可以通过印刷式天线接收无线射频信号，但是为了提高接收机的灵敏度和抗干扰能力，这种模块也适用外部天线和滤波器电路。
2．控制处理模块
控制处理模块包含MCU和外部电路，有两个功能：一是使所有模块在其控制下协调工作，二是处理和传输从接口来的数据，例如路由处理，数据打包，验证和重传请求。
模块的关键部件MCU是51系列单片机，考虑到工业功能，WINBOND 78LE546因其在8位CMOS微处理器里较好的容量特性被而被应用，与2.4-2.5伏的宽电压供电，256比特嵌入式RAM，16KB Flash EPROM以及64KB地址空间，四个8位标准I/O接口，一个标准I/O双串行口相兼容。
SCM的晶体振荡器频率是22.1184兆赫兹，电功率为3.3伏适合无线收发芯片里nRF905的逻辑水平。它的引脚通过与VCC相连受到保护并保持器稳定性。MCU与所有模块的具体连接如表1所示。
4 系统软件设计
系统性能的真实取决于其有效性和合理的软件控制。软件设计是在硬件环境的基础上开发一个无线网络协议，为了到达设计目标，这个协议要有诸如数据传输，冲突避免，错误后重传以及超时重试的功能。整个网络由一个主机和许多分散的终端组成，每个终端必须有一个无线收发节点（此系统支持Nrf905单片无线收发器），整个无线网络的任何节点都有一个唯一认证地址对应一个唯一认证终端。为了方便起见，每个确定系统的终端无线收发器节点地址都是我们自己设定的4字节。
为了提高系统的稳定性，协议被设置成停止-等待模式。在数据链路层，发送过程大概如下：首先，数据源发送一个连接请求道数据目标，得到数据源的响应后传输数据。接着，每一次传输都要等待接收方的回应。如果响应正确，另一次的传输才会开始。当所有数据传输完后，数据源将发送一个释放信道请求，当收到接收方的响应后传输结束。接收过程如下：在接收方给数据源响应后将收到数据，然后会发送一个有效或无效的响应，直到收到拆除链路请求。接下来，保存数据且发送一个响应来结束整个过程。
5 系统测试
任何两个节点之间的通信大都可以通过点对点来测试，因此在系统测试过程中，A节点和B节点之间的通信模型对测试图解来说是一个很好的样本，就像图10。
闭环测试电路是通过PC带双串口以及两个RS32口和通信节点A和B建立起来的。在一个终端，数据时通过串口测试辅助工具“串口助手V2.2” 发送，在另一端，监控着返回的数据。数据通过PC的串口A，RS32口发送，然后数据缓冲，最后成功到达终端无线收发器模块。然而，数据接收过程是SPI串口，数据缓冲，然后RS32口，最后才是PC。在本论文中，根据以收发器nRF905和51系列单片机作为核心硬件的原理设计一个低功耗高性能的无线数据通信系统。提出无线数据通信一个可行的解决方案，这个解决方案适合于强大的实时响应，高可靠性要求和小数据量，被广泛的应用于各种领域，例如数据通信，环境监测和安全保卫系统。我们相信在软件设计进一步精炼和提高以后集成和智能通信协议将会实现。
测试过程中，用数字示波器监测通信节点A、B，RS32口和SPI口的数据传输。在接下来的部分，通过分析来自MOSI/SCK和MISO/SCK的信息来验证系统的正确性。
6 总结
在本论文中，根据以收发器nRF905和51系列单片机作为核心硬件的原理设计一个低功耗高性能的无线数据通信系统。提出无线数据通信一个可行的解决方案，这个解决方案适合于强大的实时响应，高可靠性要求和小数据量，被广泛的应用于各种领域，例如数据通信，环境监测和安全保卫系统。我们相信在软件设计进一步精炼和提高以后集成和智能通信协议将会实现。
The Design of a Wireless Data Acquisition
and Transmission System
Abstract—In the field of modern wireless communication, there are mainly some technologies that provide solutions to the wireless data transmission network, such as: GSM, CDMA, 3G, Wi-Fi.These solutions make network work with high efficiency and good quality, but still with high cost. So it was difficulty in popularizing in with low cost and at the circumstance of infrastureless or infrastructure destruction. According to this situation, in this paper, the key components of the Information Terminal and the wireless receiving modules on the data collection and wireless transmission network were designed with the principle of transceiver nRF905 and 51 series of single-chip computer as the core hardware, besides, combining with the current technology on the Wireless Ad Hoc Networks,a short-rang wireless data sampling and transmission network was putting up,which provides a low-powered and high-performance wireless data communication system, works in the ISM (Industrial Scientific Medical )Band.Then,an available solution to the wireless data communications was put forward, and this solution was good at stronger real-time response, higher reliability requirement and smaller data amount. Through software and hardware debugging and actual measuring, this system based on our solution had work well, reached the expected goal and been already successfully applied to Wireless vehicle System.Index Terms—Ad Hoc Network;data acquisition; transmission network.
I. INTRODUCTION
In modern wireless communication,GSM,CDMA, 3G, and Wi-Fi become the mainstream solution of wireless data transmission network because of their high speed and reliable quality. They also have the shortcomings of high cost, so wider application would cause a great waste of resources, and they cannot be promoted in small regional, low speed data communications.Multi-point short-range wireless data collection and transmission network will be the best solution.The system supports the development of communication system of peer-to-peer, point-to-multipoint, and multipoint-to-multipoint. Short-range wireless communication can adopt different network technologies, such as Bluetooth [1], IEEE802.11 [2],HomeRF [3] and Infrared [4]. Compared with long-distance wireless communication network, they are different in the basic structure, the application level, service range, and business (data, voice). The originalintention of design of short-range wireless communication network is to provide short-distance broadband wireless access to mobile environment or formulation of temporary network, it is the further development of internet in mobile environment. The main advantage of short-range wireless communication network is lower cost and more flexible use. This paper presents the design proposal of hardware and software of information terminal (a machine) and wireless receiver module of multi-point short-range wireless data collection and transmission network, which provides a low-powered and high-performance wireless data communication system, works in the ISM （Industrial Scientific Medical）Band. The remainder of this paper is organized as follows. In Section Ⅱ, we describe the general block diagram of the wireless data acquisition and transmission system. In section Ⅲ, we analyze the key technologies about the system hardware design. In section Ⅳ, the system software design is introduced. In section Ⅴ, the testing results of system is presented. Finally, we present the conclusion and future work in Section Ⅵ.
II. SYSTEM IMPLEMENTATION MODEL
A. System Model
As a point to multi-points multi-mission wireless communication system, it consists of one central monitoring system (CMS) and Multiple Remote Terminal Units (RTU) (figure 1). In fact, this remote terminal unit is some kind of removable stations which can communicate with other stations in the process of motion. Furthermore, the CMS communicate with RTU in bidirectional way. In the next part, some pivotal segment on software and hardware of the information terminal and control center was designed.
B. Reference Model
The system in this paper is designed based on the first layer (the physical layer) and the second layer (the data link layer) of the architecture of OSI/RM (Open Systems Interconnection Reference Model) that the ISO (International Organization for Standardization) proposed, such as figure 2. The function of the physical layer is finished through constructing the circuit and special chips. Otherwise, communication protocols in the data link layer are realized by software.
Ⅲ.THE HARDWARE DESIGN OF THE SYSTEM

For the sake of the convenience of design, maintenance and update, some hardware circuit cell and node was divided into some different module according to functional and electric characteristic. There are RF Transceiver module [5], controlling and dealing module, Universal Serial interface module, data buffer and storage module and multifunctional power management module in the basic structure (Figure 2). In the process of sending, the data package should been Modulated with High frequency and sent to object RF Transmitting module, in the process of receiving, the high frequency signal have been demodulated to original data package through the RF receiver module. NRF905 [5] is the key of RF Transceiver module whose frequency is 16MHz Crystal Oscillator. NRF905 can receive the RF signal by Printed Antenna, but this module adopts the external antenna and Filter Circuits in order to improve the receiver sensitivity and anti-jamming ability.
B. Controlling and Treating modue
The controlling and treating module consists of MCU and external circuit, it have two functions: one made all module’s working under control and harmony; the other function is treating and transmitting the data got from interface, such as router processing, data packaging, verification and repeating request. Module’s key MCU is 51 series microprocessor, and considering the industrial function, the WINBOND was applied in this practical experiment because of it’s good capability in 8-bit CMOS microprocessor compatibility with 2.4-5.5V wide voltage electric supply, 256Bytes embedded RAM, 16KB Flash EPROM and 64KB addressing space, four 8 Bit standard I/O interfaces, one standard I/O dual serial interface. The Crystal Oscillator frequency of SCM is 22.1184MHz, and the electric power is 3.3V to adapting to nRF905 logical level in wireless transceiver chip. The impending PIN was protected by connecting with VCC to keeping its stability. The specific connection between MCU and all modules is described in TABLAE 1.
C. Multifunctional Electric Power Management Module
The most remarkable characteristic is compatibility with 8-24V wide voltage electric supply including CMOS power and TTL power, respectively in 5V and 3.3V, which provided all modules with the suitable and stable power. Meanwhile,it means so much in energy source saving because of its electronic switch. The power supply transfer chip C851414 and AS-1117-3.3 is the primary ingredient in this module.The C851414 made the electric voltage transfer from 8V to 24V, then, the AS-1117-3.3 made it from 5V to 3.3V. Furthermore,suitable filter capacitance and inductance was introduced to make power’s ripple characteristic perfect as possible.
D. Universal Serial Interface Module
The main function of Universal Serial interface module is connecting universal terminal equipment, such as signal output equipment or analog collection equipment with AD transfer. At the same time, it provides entrance to the computer terminal data exchange through universal RS232 serial interface.
E. Data Buffer and Storage Module
It has two kinds of function, one is data buffer, the other is data storage, respectively performed by 32KByte RAM and 16KByte EEPROM. Data buffer district supervise buffering some temporary data, such as transmit data, waiting data. Data storage district supervise some fixed data memory, such as router data, local host, local address and some renewed data for power-off protective. F. High Frequency Shielding Protecting Moudule In order to prevent electromagnetic interference from environment, circuit in our designing system is protected with metal enclosure. At the same time, preventing the digital circuit interfere from the radio frequency circuit in the system, we placed the two circuits in different isolated bin, such as figure 3. There is a small hole with diameter less than 1/4 wavelength in the metal box side, which is either easy to pass the line or prevent the electromagnetic wave from getting in it.
Ⅳ.SYSTEM SOFTWARE DESIGN
The realization of system performance depends on its effective and reasonable software control. The design of this software is on the basis of the hardware environment to development a wireless network protocol that have functions as data transmission, avoiding conflict, the retransmission when error occurs, and overtime retry, in order to achieve the design goal. The entire network is composed of a host and many scattered terminals, each terminal must have a wireless transceiver node (this system adopts nRF905 single-chip RF transceiver), any nodes of the entire wireless network has a unique identified address which is composed of an unique identified terminal. For convenience’s sake, each terminal wireless transceiver node addresses of the actual system is set by ourselves (4 bytes). In order to improve the reliability of the system, the protocol is designed as stop-wait mode. In data link layer, the send process is roughly as follow. Firstly, the data sources send a connection request to the data targets, and it will transfer data after the data sources respond. Then wait for response from data target after each transmission. If the response is correct, another transmission will start. After all the data transmission is done, the data source will send a request to release channel resources, the transmission is finished when the response from the target is received. The receive process is as follow: the data target will receive data after give a response to the source, and will give a effective or uneffective response, until receive a demolition request. Then, save the data and send a response to end the entire process. data values are serially transferred, pumped into a shift register and are then internally available for parallel processing. Here we already see an important point, that must be considered in the philosophy of SPI bus systems: The length of the shift registers is not fixed, but can differ from device to device. Normally the shift registers are 8Bit or integral multiples of it. Of course there also shift registers with an odd number of bits. For example two cascaded 9Bit EEPROMs can store 18Bit data. If a SPI device is not selected, its data output goes into a high-impedance state, so that it does not interfere with the currently activated devices. When cascading several SPI devices, they are treated as one slave and therefore connected to the same chip select [5]. In figure 4 the cascaded devices are evidently looked at as one larger device and receive therefore the same chip select. The data out