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电子技术-芯片资料-74HC173.pdf

1、TL/F/5317MM54HC173/MM74HC173 TRI-STATE Quad D Flip-FlopJanuary 1988MM54HC173/MM74HC173TRI-STATE?Quad D Flip-FlopGeneral DescriptionThe MM54HC173/MM74HC173 is a high speed TRI-STATEQUAD D TYPE FLIP-FLOP that utilizes advanced silicon-gate CMOS technology.It possesses the low power con-sumption and hi

2、gh noise immunity of standard CMOS inte-grated circuits,and can operate at speeds comparable tothe equivalent low power Schottky device.The outputs arebuffered,allowing this circuit to drive 15 LS-TTL loads.Thelarge output drive capability and TRI-STATE feature makethis part ideally suited for inter

3、facing with bus lines in a busoriented system.The four D TYPE FLIP-FLOPS operate synchronously froma common clock.The TRI-STATE outputs allow the deviceto be used in bus organized systems.The outputs areplaced in the TRI-STATE mode when either of the two out-put disable pins are in the logic 1 level

4、The input disableallows the flip-flops to remain in their present states withouthaving to disrupt the clock.If either of the 2 input disablesare taken to a logic 1 level,the Q outputs are fed back tothe inputs,forcing the flip flops to remain in the same state.Clearing is enabled by taking the CLEA

5、R input to a logic 1level.The data outputs change state on the positive goingedge of the clock.The 54HC/74HC logic family is functionally as well as pin-out compatible with the standard 54LS/74LS logic family.All inputs are protected from damage due to static dis-charge by internal diode clamps to V

6、CCand ground.FeaturesYTypical propagation delay:18 nsYWide operating supply voltage range:26VYTRI-STATE outputsYLow input current:1 mA maximumYLow quiescent supply current:80 mA maximum(74HC)YHigh output drive current:6 mA minimumConnection DiagramDual-In-Line PackageTL/F/53171Top ViewOrder Number M

7、M54HC173 or MM74HC173Truth TableInputsClearClockData EnableDataOutputG1G2DQHXXXXLLLXXXQ0LuHXXQ0LuXHXQ0LuLLLLLuLLHHWhen either M or N(or both)is(are)high the out-put is disabled to the high-impedance state:how-ever,sequential operation of the flip-flops is notaffected.Hehigh level(steady state)Lelow

8、level(steady state)uelow-to-high level transitionXedont care(any input including transitions)QOethe level of Q before the indicated steady state input condi-tions were establishedTRI-STATE?is a registered trademark of National Semiconductor Corp.C1995 National Semiconductor CorporationRRD-B30M105/Pr

9、inted in U.S.A.Absolute Maximum Ratings(Notes 1&2)If Military/Aerospace specified devices are required,pleasecontacttheNationalSemiconductorSalesOffice/Distributors for availability and specifications.Supply Voltage(VCC)b0.5 toa7.0VDC Input Voltage(VIN)b1.5 to VCCa1.5VDC Output Voltage(VOUT)b0.5 to

10、VCCa0.5VClamp Diode Current(IIK,IOK)g20 mADC Output Current,per pin(IOUT)g35 mADC VCCor GND Current,per pin(ICC)g70 mAStorage Temperature Range(TSTG)b65C toa150CPower Dissipation(PD)(Note 3)600 mWS.O.Package only500 mWLead Temperature(TL)(Soldering 10 seconds)260COperating ConditionsMinMaxUnitsSuppl

11、y Voltage(VCC)26VDC Input or Output Voltage0VCCV(VIN,VOUT)Operating Temp.Range(TA)MM74HCb40a85CMM54HCb55a125CInput Rise or Fall TimesVCCe2.0V(tr,tf)1000nsVCCe4.5V500nsVCCe6.0V400nsDC Electrical Characteristics(Note 4)TAe25C74HC54HCSymbolParameterConditionsVCCTAeb40 to 85CTAeb55 to 125CUnitsTypGuaran

12、teed LimitsVIHMinimum High Level2.0V1.51.51.5VInput Voltage4.5V3.153.153.15V6.0V4.24.24.2VVILMaximum Low Level2.0V0.50.50.5VInput Voltage*4.5V1.351.351.35V6.0V1.81.81.8VVOHMinimum High LevelVINeVIHor VILOutput VoltagelIOUTls20 mA2.0V2.01.91.91.9V4.5V4.54.44.44.4V6.0V6.05.95.95.9VVINeVIHor VILlIOUTls

13、6.0 mA4.5V3.983.843.7VlIOUTls7.8 mA6.0V5.485.345.2VVOLMaximum Low LevelVINeVIHor VILOutput VoltagelIOUTls20 mA2.0V00.10.10.1V4.5V00.10.10.1V6.0V00.10.10.1VVINeVIHor VILlIOUTls6.0 mA4.5V0.260.330.4VlIOUTls7.8 mA6.0V0.260.330.4VIINMaximum InputVINeVCCor GND6.0Vg0.1g1.0g1.0mACurrentIOZMaximum TRI-STATE

14、VOUTeVCCor GND6.0Vg0.5g5.0g10mAOutput LeakageEnableeVIHICCMaximum QuiescentVINeVCCor GND6.0V8.080160mASupply CurrentIOUTe0 mANote 1:Absolute Maximum Ratings are those values beyond which damage to the device may occur.Note 2:Unless otherwise specified all voltages are referenced to ground.Note 3:Pow

15、er Dissipation temperature derating plastic N package:b12 mW/C from 65C to 85C;ceramic J package:b12 mW/C from 100C to 125C.Note 4:For a power supply of 5Vg10%the worst case output voltages(VOH,and VOL)occur for HC at 4.5V.Thus the 4.5V values should be used when designingwith this supply.Worst case

16、 VIHand VILoccur at VCCe5.5V and 4.5V respectively.(The VIHvalue at 5.5V is 3.85V.)The worst case leakage current(IIN,ICC,andIOZ)occur for CMOS at the higher voltage and so the 6.0V values should be used.*VILlimits are currently tested at 20%of VCC.The above VILspecification(30%of VCC)will be implem

17、ented no later than Q1,CY89.2AC Electrical CharacteristicsVCCe5V,TAe25C,CLe45 pF,tretfe6 nsSymbolParameterConditionsTypGuaranteed LimitUnitsfMAXMaximum Operating Frequency4530MHztPHL,tPLHMaximum Propagation31nsDelay:Clock to QtPHLMaximum Propagation1827nsDelay:Clear to QtPZH,tPZLMaximum Output Enabl

18、e TimeRLe1 kX1828nstPHZ,tPLZMaximum Output DisableRLe1 kX1625nsTimeCLe5 pFtSMinimum Data Setup Time20nstSMinimum Data Enable Setup Time20nstHMinimum Data Hold Time0nstHMinimum Data Enable Hold Time0nstWMinimum Clock Pulse Width16nsAC Electrical CharacteristicsVCCe2.0V to 6.0V,CLe50 pF,tretfe6 ns(unl

19、ess otherwise specified)TAe25C74HC54HCSymbolParameterConditionsVCCTAeb40 to 85CTAeb55 to 125CUnitsTypGuaranteed LimitsfMAXMaximum OperatingCLe50 pF2.0V10544MHzFrequency4.5V45272118MHz6.0V55322521MHztPHL,tPLHMaximum PropagationCLe50 pF2.0V80175220262nsDelay from Clock to QCLe150 pF2.0V110225280338nsC

20、Le50 pF4.5V23354453nsCLe150 pF4.5V28455668nsCLe50 pF6.0V21303845nsCLe150 pF6.0V26384857nstPHLMaximum PropagationCLe50 pF2.0V70150189224nsDelay from Clear to QCLe150 pF2.0V100200252298nsCLe50 pF4.5V20303845nsCLe150 pF4.5V25405060nsCLe50 pF6.0V17263238nsCLe150 pF6.0V22344351nstPZH,tPZLMaximum OutputRL

21、e1 kXEnable TimeCLe50 pF2.0V70150189224nsCLe150 pF2.0V100200252298nsCLe50 pF4.5V20303845nsCLe150 pF4.5V25405060nsCLe50 pF6.0V17263238nsCLe150 pF6.0V22344351nstPHZ,tPLZMaximum Output DisableRLe1 kX2.0V70150189224nsTimeCLe50 pF4.5V20303845ns6.0V17263238nstSMinimum Data or Data2.0V100125150nsEnable Set

22、up Time4.5V202530ns6.0V172125nstREMMinimum Removal2.0V90112135nsTime4.5V182226ns6.0V151922nstHMinimum Data or Data Enable2.0V000nsHold Time4.5V000ns6.0V000nstWMinimum Clear or Clock2.0V3080100120nsPulse Width4.5V9162024ns6.0V8141720ns3AC Electrical Characteristics(Continued)VCCe2.0V to 6.0V,CLe50 pF

23、tretfe6 ns(unless otherwise specified)TAe25C74HC54HCSymbolParameterConditionsVCCTAeb40 to 85CTAeb55 to 125CUnitsTypGuaranteed LimitstTHL,tTLHMaximum Output2.0V25607590nsRise and Fall Time4.5V7121518ns6.0V5101315nstr,tfMaximum Input Rise and2.0V100010001000nsFall Time4.5V500500500ns6.0V400400400nsCP

24、DPower Dissipation Capacitance(per flop)80pFCINMaximum Input Capacitance5101010pFCOUTMaximum Output10202020pFCapacitanceNote 5:CPDdetermines the no load dynamic power consumption,PDeCPDVCC2faICCVCC,and the no load dynamic current consumption,ISeCPDVCCfaICC.4Physical Dimensionsinches(millimeters)Dual

25、In-Line PackageOrder Number MM54HC173J or MM74HC173JNS Package J16A5MM54HC173/MM74HC173 TRI-STATE Quad D Flip-FlopPhysical Dimensionsinches(millimeters)(Continued)Dual-In-Line PackageOrder Number MM74HC173NNS Package N16ELIFE SUPPORT POLICYNATIONALS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL C

26、OMPONENTS IN LIFE SUPPORTDEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONALSEMICONDUCTOR CORPORATION.As used herein:1.Lifesupportdevicesorsystemsaredevicesor2.A critical component is any component of a lifesystems which,(a)are intended for surgical implantsupport de

27、vice or system whose failure to perform caninto the body,or(b)support or sustain life,and whosebe reasonably expected to cause the failure of the lifefailure to perform,when properly used in accordancesupport device or system,or to affect its safety orwith instructions for use provided in the labeli

28、ng,caneffectiveness.be reasonably expected to result in a significant injuryto the user.National SemiconductorNational SemiconductorNational SemiconductorNational SemiconductorCorporationEuropeHong Kong Ltd.Japan Ltd.1111 West Bardin RoadFax:(a49)0-180-530 85 8613th Floor,Straight Block,Tel:81-043-2

29、99-2309Arlington,TX 76017Email:Ocean Centre,5 Canton Rd.Fax:81-043-299-2408Tel:1(800)272-9959Deutsch Tel:(a49)0-180-530 85 85Tsimshatsui,KowloonFax:1(800)737-7018EnglishTel:(a49)0-180-532 78 32Hong KongFran3ais Tel:(a49)0-180-532 93 58Tel:(852)2737-1600ItalianoTel:(a49)0-180-534 16 80Fax:(852)2736-9960National does not assume any responsibility for use of any circuitry described,no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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