可测性设计和DFT软件的使用专题培训课件.ppt

单击此处编辑母版标题样式,单击此处编辑母版文本样式,第二级,第三级,第四级,第五级,20007-11-5,共49页,*,可测性设计和DFT软件的使用,Outline,DFT,基础,DFTCompile,生成扫描链,TetraMAX,生成,ATPG,设计实例,20007-11-5,2,共49页,DFT基础,测试,DFT,故障模型,ATPG,DFT常用方法,20007-11-5,3,共49页,测试(1-3),CMOS,反相器,中的物,理缺陷,20007-11-5,4,共49页,测试(2-3),目前的,产品测,试方法,20007-11-5,5,共49页,测试(3-3),ATE,20007-11-5,6,共49页,DFT基础,测试,DFT,故障模型,ATPG,DFT,常用方法,20007-11-5,7,共49页,DFT(Design For Test),controllability,observability,20007-11-5,8,共49页,DFT基础,测试,DFT,故障模型,ATPG,DFT,常用方法,20007-11-5,9,共49页,故障模型,物理故障逻辑故障,封装引脚间的漏电或短路 单一固定故障,芯片焊接点到管脚连线断裂延时故障,表面玷污、含湿气静态电流故障,金属层迁移、应力、脱皮 ,金属层开路、短路 ,20007-11-5,10,共49页,单一固定故障,20007-11-511,共49页,等价故障(1/3),20007-11-5,12,共49页,等价故障(2/3),20007-11-5,13,共49页,等价故障(3/3),NAND的输入SA0和输出的SA1效果等效,A,SA0,B,SA0,Y,SA1是一个等效故障集,20007-11-5,14,共49页,故障压缩,20007-11-5,15,共49页,不可测故障,20007-11-5,16,共49页,DFT基础,测试,DFT,故障模型,ATPG,DFT,常用方法,20007-11-5,17,共49页,ATPG,ATPG Automatic Test Pattern Generator,D算法,PODEM(Goel),FAN(Fujiwara和Shimono),高级算法,20007-11-5,18,共49页,D算法,20007-11-5,19,共49页,D算法-activate the SA0 fault,20007-11-5,20,共49页,D算法-propagate fault effect,20007-11-5,21,共49页,D算法-anatomy of a test pattern,20007-11-5,22,共49页,D算法-record the test pattern,20007-11-5,23,共49页,DFT基础,测试,DFT,故障模型,ATPG,DFT,常用方法,20007-115,24,共49页,DFT常用方法,功能点测试,需在每个测试点增加可控的输入和输出，,I/O,增加,扫描测试,结构化的,DFT,技术，全扫描和部分扫描,内建自测试,消除了对,ATE,的存储能力和频率的限制，更具发展潜力,20007-11-5,25,共49页,扫描测试(1/2),20007-11-5,26,共49页,扫描测试(2/2),20007-11-5,27,共49页,Outline,DFT,基础,DFTCompile,生成扫描链,TetraMAX,生成,ATPG,设计实例,20007-11-5,28,共49页,设计,流程,20007-11-5,29,共49页,普通D触发器,20007-11-5,30,共49页,Test-Ready Compilation,set_scan_configuration -style multiplexed_flip_flop,-clock_mixing no_mix,-chain_count 1,set_dft_signal-view existing_dft-type ScanClock -port clk -timing 1 8.5,set_dft_signal-view existing_dft-type Reset -port rst_n-active_state 0,set_dft_signal-view spec-type ScanEnable -port se -active_state 1,set_dft_signal-view spec-type ScanDataIn -port a,set_dft_signal-view existing_dft -type ScanDataOut-port o,20007-11-5,31,共49页,Test DRC,check_scan or check_test,这两个命令检查以下四类可测性问题：,模型问题，诸如是否缺少相应的扫描单元；,拓扑结构问题，例如是否存在不受时钟控制的组合逻辑反馈回路；,确定测试协议，如找出测试时钟端口，找出测试模式下固定电平的测试状态端口；,测试协议仿真，检查扫描过程是否可以正确的进行。,20007-11-5,32,共49页,Preview Scan Architecture,preview_scan show all,预览将要生成的扫描链的大致情况，及时发现不合乎要求的地方。,20007-11-5,33,共49页,Scan Insertion,insert_scan,使扫描触发器串链，建立和排序扫描链，同时进行优化以去除违反的,DRC,规则。,20007-11-5,34,共49页,扫描触发器,20007-11-5,35,共49页,Report,report_constraint-all_violators,report_scan_path-view existing_dft-chain,report_scan_path-view existing_dft-cell,estimate_test_coverage,20007-11-5,36,共49页,Export to TetraMAX,write_test_protocol -output./report/add.spf,write-f verilog-hie -output./report/add.v,20007-11-5,37,共49页,Outline,DFT,基础,DFTCompile,生成扫描链,TetraMAX,生成,ATPG,设计实例,20007-11-5,38共49页,设计,流程,20007-11-5,39,共49页,Read the Netlist,BUILD read netlist,mydesign.v,读入,DFTC,转交给,TetraMAX,的网表文件。,20007-11-5,40,共49页,Read Library Models,BUILD read netlist library./simic18.v,必须读入所有和你的设计相关的,verilog,库模型，此库文件由工艺厂商提供。,20007-11-5,41,共49页,Build the Model,BUILD run build_model top_module,20007-11-5,42,共49页,Performing DRC,BUILD run drc mydesign.spf,测试协议文件的,DRC,检查,20007-11-5,43,共49页,Preparing for ATPG,TEST add faults-all,初始化故障列表以产生一份新的在,ATPG,设计模型中包含所有可能的故障点的故障列表,20007-11-5,44,共49页,Run ATPG,TEST run atpg random,默认情况下，,TetraMAX,先执行,Basic-Scan ATPG,，接着是,Sequential ATPG,，最后是,Full-Sequential ATPG,20007-11-5,45,共49页,Review Test Coverage,TEST report summaries,TEST report patterns summary,查看测试覆盖率和产生的矢量的数目，若测试覆盖率很低，则需要重新进行,ATPG,测试矢量生成，直到得到满意的测试覆盖率。,20007-11-5,46,共49页,Compress Test Patterns,TEST run pattern_compress 99,99,指示按不同的顺序进行,99,次故障仿真,20007-11-5,47,共49页,Save Test Pattern,TEST write patterns patterns.stil-format stil,TEST write faults faults.AU-class au,.,stil,文件与,.,spf,文件的格式一样，都是采用,stil,语言描述，所不同的是增加了,pattern,部分，给出了各个测试,pattern,的具体细节。,20007-11-5,48,共49页,Outline,DFT,基础,DFTCompile,生成扫描链,TetraMAX,生成,ATPG,设计实例,20007-11-5,49,共49页,