浮点运算计算机组成原理.ppt

,*,*,*,计算机组成原理,Principles of,Computer Organization,广义双语教学课程,211.64.192.109/skyclass25/,青岛理工大学,校级精品课程,运算方法和运算部件,(5),Floating-point computation in a computer can run into three kinds of problems:,An operation can be mathematically illegal,such as division by zero.,An operation can be legal in principle,but not supported by the specific format,for example,calculating the square root of 1 or the inverse sine of 2(both of which result in complex numbers).,An operation can be legal in principle,but the result can be impossible to represent in the specified format,because the exponent is too large or too small to encode in the exponent field.Such an event is called an overflow(exponent too large)or underflow(exponent too small).,2,3.5,浮点数的运算方法,Floating-Point Arithmetic,浮点加减法运算,浮点乘法运算,Floating-Point Multiplication,Floating-Point Addition&Subtraction,浮点除法运算,Floating-Point Division,3,浮点运算,Floating-Point Arithmetic,浮点运算,要把,阶码,和,尾数分别处理。,阶码,的,运算,是,定点整数运算,，,对阶码,的,运算,有,四种：阶码加,1,，,阶码减,1,，,两阶码求和,，,两阶码求差,。,尾数,的,运算,是,定点小数运算。,运算,过程中,一般取双符号位。,浮点运算器,总是由,处理阶码,和,处理尾数,的,两部分组成。,Floating-point representation is similar in concept to scientific notation.The way in which the,significand,exponent and sign bits are internally stored on a computer is implementation-dependent.,4,浮点数的溢出,Overflow,当一个数的大小,超出了浮点数的表示范围,时，机器无法表示该数，就发生,溢出,。,浮点数的溢出判断方法与定点数不同，是对,规格化数的阶码,Exponent,进行判断。,当浮点数的,阶码大于机器所能表示的最大阶码,时（即,阶码发生正溢出,），称为,溢出(,Overflow,),或,上溢,，此时机器应停止运算，进行出错中断处理。,当浮点数的,阶码小于机器所能表示的最小阶码,时（即,阶码发生负溢出,），称为,下溢(,Underflow,),。,这时一般规定把该,浮点数,的,尾数强迫置零,，,作为零处理,，机器可继续运行。,当一个,浮点数,的,尾数为,0,，不论其阶码为何值，或者,阶码,的值,小于等于它能表示的最小数值,（,下溢,）时，不论其尾数为何值，计算机都把该浮点数看成,零,值，称为,机器零,。,浮点数,的,尾数运算,的,溢出,可以,通过右规消除,。,不算溢出,5,浮点加减法运算,Floating-Point Addition&Subtraction,设有两个,规格化浮点数,X=M,X,2,Ex,，Y=M,Y,2,Ey,若两数的,阶码相等,，即,E,X,=E,Y,，,有,X+Y=,将两浮点数的尾数相加，就可得到浮点形式的和。,一般情况下，,E,X,E,Y,，,计算,X+Y,要用如下五个步骤来完成,：,对阶,尾数相加,规格化,舍入,检查阶码是否溢出,。,1,、,浮点加法,运算,Floating-Point Addition,M,X,2,Ex,+M,Y,2,Ey,=（M,X,+M,Y,）2,Ex,6,(1),对阶,Alignment,两数相加，必须使,小数点对齐,。对于浮点数来说，就是使,阶码相等,。使阶码相等的过程称为,对阶,。,对阶,的原则是：,小的阶码向大阶码看齐,。,对阶,操作，首先,比较两数,的,阶码值,的大小，即求,E=E,X,E,Y,，,并保留其最大值,E=MAX（E,X,，E,Y,）,作为,和的阶码,。,当,E0,时，将,阶码小的数,的,尾数右移,|,E|,位,。,尾数每右移一次将阶码加,1,，直至,E0,。,为了减少误差，可用附加线路（,Guard bits,保留位）保留右移出的,1,位或几位的高位，在以后的舍入操作时用。,(2),尾数相加,Add the,Significands,（Mantissa）,完成对阶后，将,两浮点数,的,尾数部分相加,，方法与,定点小数加法,相同。,7,(3),规格化处理,Normalize the Result,当,运算结果,的,尾数部分不是规格化数,（即不是,00,.1,或,11,.0,的形式）时，必须进行,规格化处理,。,规格化处理,的规则：,若,结果尾数,的,两个符号位不同,（,01,或,10,），表明,尾数运算结果溢出,，应进行,右规,。将结果,尾数右移一位,，并将,阶码,的值,加,1,。,若尾数的运算结果不溢出，但,最高数值位与符号位同值,（即,11.,1,或,00,.,0,），则应进行,左规,。,将,尾数,连,同符号位一起左移一,位，并将,和的阶码减,1,，如此反复直至尾数最高数值位与符号位不同为止。,8,(4),舍入操作,Rounding,在进行对阶或右规操作时，尾数低位的一位或几位数值被移出。如果采用“截断法”把移出的数位丢掉，会影响数值的精度,。,因此，可采用舍入法来减少误差。,“,0”,舍“,1”,入法,当移出部分的最高位为,1,时在尾数末位加,1,，为,0,时则舍去移出的数值。此方法的最大误差为,2,(,n+1),。,“,0”,舍“,1”,入法由于有舍有入，舍入机会均等，有利于减少误差积累。但对末位加,1,的操作可能引起一连串的进位而使尾数溢出，此时还要再做一次右规。,末位恒置,1法,无论右移丢失的是何数值，一律将,结果,的,末位置,1,。,把尾数最低位的,0,置成,1,，对于正数，是使其值变大，对于负数补码和反码，则使其值变小。而舍入前尾数最低位已经是,1,时，再置,1,无实际效用，与截断法无异。,9,(5),检查阶码是否溢出,Check the Exponent Overflow,or,Underflow,若阶码正常，加减运算正常结束；若阶码下溢，要置运算结果为浮点形式的机器零；若阶码上溢，则置溢出标志。,【例1】,浮点数的阶码为,4,位补码，尾数为,9,位补码。,X0.110110112,010,，Y=（0.10101100）2,100,，求X+Y=?,Rounding is used when the exact result of a floating-point operation(or a conversion to floating-point format)would need more digits than there are digits in the,significand,.There are several different rounding schemes(or rounding modes).,10,例1,浮点数,的,阶码为,4,位补码,，,尾数为,9,位补码,。,求,X+Y=,?,X0.110110112,010,，Y=（0.10101100）2,100,，,解：,E,X,补,=0010,，,E,Y,补,=0100,，,-,E,Y,补,=1100,M,X,补,=0.11011011,，,M,Y,补,=1.01010100,对阶,E,补,=,E,X,E,Y,补,=,E,X,补,-,E,Y,补,=00010+11100=11110,即,E2。,由于,X,的阶码小，应使,M,X,右移两位，,E,X,加2，,E,X+Y,补,=E,Y,补,=00100 M,X,补,=00.00110110,11,尾数相加,0 0.0 0 1 1 0 1 1 0,+)1 1.0 1 0 1 0 1 0 0,1 1.1 0 0 0 1 0 1 0,M,X+Y,补,=,M,X,补,+,M,Y,补,=00.00110110 11 +11.01010100,=11.10001010 11,00010,+,11100,11110,11,规格化处理,结果的符号位与最高数值位同值，应进行左规。,尾数左移,1,位，阶码减,1。,M,X+Y,补,=11.00010101 10,，,E,X+Y,补,=00011,舍入处理,采用,0舍1,入法，,M,X+Y,补,=11.00010110,判断溢出,补码表示的阶码的符号位为,00,，不溢出。结果：,M,X+Y,补,=1.00010110,，,E,X+Y,补,=0011,XY（0.11101010）2,+011,例1,浮点数,的,阶码为,4,位补码,，,尾数为,9,位补码,。,求,X+Y=,?,12,2,、浮点数减法,Floating-Point Subtraction,对阶，,尾数相减,，,规格化，,舍入，,检查阶码是否溢出。,浮点数减法运算的步骤：,The fact that floating-point numbers cannot faithfully mimic the real numbers,and that floating-point operations cannot faithfully mimic true arithmetic operations,leads to many surprising situations.This is related to the finite precision with which computers generally represent numbers.,13,浮点乘法运算,Floating-Point Multiplication,两浮点数相乘，,乘积,的,尾数,为相乘,两数,的,尾数之积,，,阶码,为,两数,的,阶码之和,，即,XY,浮点乘法运算,可分为四个步骤：,阶码相加,尾数相乘,规格化和舍入处理,判断溢出,（M,X,2,Ex,）（M,Y,2,Ey,）=,（,M,X,M,Y,）2,Ex+,Ey,规格化浮点数,X=M,X,2,Ex,，Y=M,Y,2,Ey,To multiply,the,significands,are multiplied while the exponents are added,and the result is rounded and normalized.,14,阶码相加,Add Exponent,乘数和被乘数的,阶码按定点整数补码或移码加法的规则相加,，得到乘积的阶码。,尾数相乘,Multiply,Significands,乘数和被乘数的,尾数按定点小数,（,原码或补码,）,乘法运算的方法相乘,，得到乘积的尾数。,规格化,和,舍入处理,Normalizing&Round,规格化和舍入方法与浮点加减法处理的方法相同。但两个数值位是,m,位的数相乘，乘积的数值位为,2,m,位。舍入处理后，,尾数只保留,m,个数值位,。,一般情况下，,两个规格化数相乘,，,尾数最多左规一次,，因为两个纯小数相乘是不会,溢出的,。但是有一个特例，当尾数做,补码乘法,的时候，如果乘数和被乘数尾数的值都是,-1,，则乘积的尾数的值是,+1,，此时需要做一次,右规,。,15,判断溢出,Check the Exponent Overflow or,Underflow,检查阶码是否溢出。若阶码正常，加减运算正常结束；若阶码下溢，要置运算结果为浮点形式的机器零；若阶码上溢，则置溢出标志。,Floating-point arithmetic is at its best when it is simply being used to measure real-world quantities over a wide range of scales(such as the orbital period of planet or the mass of the proton),and at its worst when it is expected to model the interactions of quantities expressed as decimal strings that are expected to be exact.,An example of the latter case is financial calculations.For this reason,financial software tends not to use a binary floating-point number representation.,浮点乘法运算,Floating-Point Multiplication,16,【例2】,浮点数，阶码为,4,位移码,（含,1,符号位），尾数为,8,位补码,（含,1,符号位），阶码以,2,为底。,X0.11100112,-101,，Y=（0.1110010）2,011,，求XY=?,解：,M,X,补,=,M,Y,补,=,阶码相加,E,X,E,Y,移,=,E,X,移,=,0.1110011,=00011,0011,E,Y,移,=,1.0001110,=01011,1011,00110,=00011+00011=,E,X,移,E,Y,补,E,X,补,=,E,Y,补,=,1011,0011,00011,+00011,00110,浮点乘法运算,Floating-Point Multiplication,17,例2,浮点数，阶码为,4,位移码（含,1,符号位），尾数为,8,位补码（含,1,符号位），阶码以,2,为底。,尾数相乘,规格化和舍入处理,判断溢出,M,X,补,M,Y,补,=,已经是规格化数。,M,XY,补,=1.0011010,移码,表示的,阶码符号位,为,00,，,未溢出,。,XY=,采用,0舍1,入法,，,将低,n,位舍去,。,1.00110011001010,0.11100111.0001110=,E,XY,移,=00110,X0.11100112,-101,，Y=（0.1110010）2,011,，求X*Y=?,M,X,补,=0.1110011,M,Y,补,=1.0001110,E,XY,移,=00110,2,（-0.1100110）,010,18,浮点除法运算,Floating-Point Division,除了,除数不能为,0,外,，,浮点除法对除数和被除数的大小没有限制,。,两浮点数相除,，,商,的,尾数,部分是,被除数的尾数除以除数,的,尾数所得,的,商,，,阶码,部分是,被除数,的,阶码减去除数,的,阶码所得,的,差,。,XY=,浮点除法运算,分以下五个步骤：,尾数调整,阶码求差,尾数相除,规格化,判断溢出,（M,X,2,Ex,）（M,Y,2,Ey,）,（,M,X,M,Y,）2,Ex,Ey,19,尾数调整,Dividend Alignment,检查,|,M,X,|,是否小于,|,M,Y,|,。,若,|,M,X,|M,Y,|,，,则将,M,X,右移一位,并将,阶码加,1,。,阶码求差,Subtract Exponent,被除数的阶码减去除数的阶码得到商的阶码,（按定点整数补码或移码减法的规则）。,尾数相除,Divide,Significands,两数的尾数按定点小数（原码或补码）除法的规则相除。,浮点除法运算,Floating-Point Division,20,判断溢出,检查阶码是否溢出。,规格化,Normalize the Result,由于除数和被除数都是规格化数并经过尾数的调整，所以，尾数相除的结果一般是规格化定点小数。,只,有一个例外,，当补码,表示的,商为,-0.5,时，必须做一次,左,规。,In the IEEE 754 standard,zero is signed,meaning that there exist both a positive zero(+0)and a negative zero(-0).In most run-time environments,positive zero is usually printed as 0,while negative zero may be printed as-0.The two values behave as equal in numerical comparisons,but some operations return different results for+0 and 0.,浮点除法运算,Floating-Point Division,21,例3,设浮点数基数为,2,，阶码为,4,位补码，尾数为,5,位原码（均包含,1,个符号位）。,X=+6.5，Y=2.25,。,（1,）写出,X,和,Y,的规格化浮点机器数。,（2,）计算,XY（,尾数运算用补码加减交替除法）,解：,X=（+6.5）,10,=,Y=（-2.25）,10,=,E,X,补,=,0011,设,浮点数格式,为：,尾符,尾数,阶码,1 2 5 6 9,浮点机器数,：,X,浮点,=0 0011,1101,（1,）写出,X,和,Y,的,规格化浮点机器数,。,（+110.1）,2,=,+0.11012,+011,（-10.01）,2,=,-0.10012,+010,E,Y,补,=0010,M,X,原,=0.1101,M,Y,原,=1.1001,Y,浮点,=1 0010 1001,22,（2,）计算,XY（,尾数运算用补码加减交替除法）,M,X,补,=,尾数调整,阶码求差,尾数相除,|M,X,|M,Y,|,M,X,补,=,-E,Y,补,=,E,X,E,Y,补,=,00100,+11110,M,Y,补,=1.0111,E,X,补,=0011 E,Y,补,=0010 M,X,原,=0.1101 M,Y,原,=1.1001,0.1101,M,Y,补,=,1.0111,-M,Y,补,=,需进行尾数调整，,将,M,X,右移,1,位，,E,X,加1,。,E,X,补,=,=00100+11110=,E,X,补,+-,E,Y,补,00010,0.01101=0.0111,0100,1110,00010,0.1001,0舍1入,23,规格化,判断溢出,M,XY,补,=1.0 0 1 1,M,XY,原,=,阶码（补码）的符号位为,00,，没有溢出。,尾数已经是,规格化的。,结果：,XY=,-0.11012,+010,1.1 1 01,The range of floating-point numbers depends on the number of bits or digits used for representation of the,significand,(the significant digits of the number)and for the exponent.,浮点除法运算,Floating-Point Division,24,计算机中的,运算器,是,对数据进行加工处理的部件,，有,定点运算器,和,浮点运算器,之分。,定点运算器,主要用于实现对,定点整数,或,定点小数,的,算术运算,，对,二进制位串,的,逻辑运算,，以及对,主存,的,地址计算,等。,只有定点运算器的计算机可以用软件实现浮点运算。,运算器能同时处理,的,二进制位数,称为,计算机,的,字长，,它与,通用寄存器,的,位数,是,一致,的。,字长影响到计算机,的,运算速度快慢,，,计算精度,和,指令功能,的,强弱,等，是计算机性能的重要指标。,定点运算部件,运算器,由,算术逻辑运算单元、通用寄存器组、状态标志位、输入数据选择电路,和,输出数据控制电路,等,组成。,高档计算机的运算器还有专门的,乘法,和,除法,部件。,3.6 运算部件,25,A typical schematic symbol for an ALU:A D is an output status.In computing,an arithmetic logic unit(ALU)is a digital circuit that performs arithmetic and logical operations.,Mathematician John,von Neumann,proposed the ALU concept in 1945,when he wrote a report on the foundations for a new computer called the EDVAC.,Von,Neumann,stated that an ALU is a necessity for a computer because it is guaranteed that a computer will have to compute basic mathematical operations,including addition,subtraction,multiplication,and division.,ALU,26,计算机,中的,所有算术运算（、）都可用加法,和,移位,来,完成，,所以,ALU,中,的,最主要,的,部件是加法器,。,ALU,也是,计算机中传送数据,的,一条重要途径。,通用寄存器组用来暂存参与运算,的,数据,和,某些中间运算结果,。,The inputs to the ALU are the data to be operated on(called operands)and a code from the control unit indicating which operation to perform.Its output is the result of the computation.,In many designs the ALU also,takes,or,generates,as inputs or outputs a set of condition codes,from,or,to,a status register.,These codes are used to indicate cases such as carry-in or carry-out,overflow,divide-by-zero,etc.,ALU,27,状态标志位,用来,记录算术/逻辑运算,或,测试操作,的,结果状态,。,这些状态,通常用作,程序条件转移指令,的,判断条件,，,所以又称为“,程序状态字,”（,PSW）,，,“,条件码寄存器,”（,Condition Codes）,等,。,常用的状态标志（,Flag）,有：,进位标志,C,y,（,加法运算结果最高位产生进位,或,减法运算结果最高位有借位时，,C,y,置1,）,零标志,Z（,运算结果为0时，,Z,置1）,符号标志,S,（,算术运算结果,的,最高位为1,即认为是,负值,，,S,置1,）,溢出标志,V（,算术运算结果发生溢出时，,V,置1）,奇偶标志,P（,逻辑运算结果有偶数个1时，,P,置1）,28,输入数据选择电路,用来,选择,把,哪一个,或,哪两个数据送入,ALU,，,以及,决定送入,的,数据是,以,补码,或是以,反码,的,形式。,输出数据控制电路,一般有,移位功能,，并具有把,加法器输出,的,数据传送,到,通用寄存器,的,通路,和,通往总线,的,控制电路。,多路开关,多路开关,ALU,移位电路,多路开关,控制信号,功能控制,控制信号,斜传电路,如果,ALU,与各,寄存器之间有直接数据通路,29,如果，,ALU,与各,寄存器之间采用总线结构,内部单数据总线结构的运算器,暂存器,ALU,内部总线,功能控制,移位电路,30,缓冲器,通用寄存器组,ALU,移位电路,总线,1,总线,2,内部双数据总线结构的运算器,ALU,与各,寄存器之间采用总线结构,31,总线,旁路器,通用寄存器组,ALU,移位电路,总线1,总线2,总线3,内部三数据总线结构的运算器,ALU,与各,寄存器之间采用总线结构,32,浮点运算部件,Floating Point Unit,A Floating Point Unit also performs arithmetic operations between two values,but they do so for numbers in floating point representation,which is much more complicated than the twos complement representation used in a typical ALU.,每个浮点部件,都,包含阶码运算,和,尾数运算两个定点运算器,。,浮点运算器包含浮点加法,、,乘法,和,除法三个浮点运算部件。,In order to do these calculations,a FPU has several complex circuits built-in,including some internal,ALUs,.,33,3.1.2,十进制数的编码与运算,（1）8421码的加法运算,两个8421,BCD,码数相加如果按照二进制数加法规则进行，当其和小于或等于9时，结果是正确的。,例如，计算2348？,0010 0011,)0100 1000,0110 1011低4位大于9,+)0110加6修正,0111 0001和数是71,十进制数是以十为模，“逢十进一”的。,但4位二进制数的模是2,4,16，当和大于9而小于16时，加法器并不产生进位。此时，和数是10101111，这6种代码不是8421码，结果是错误的。因此，应对和数的对应位进行加6修正。,34,当两个8421码数相加，和大于16时，会产生进位。,但这是按模16进位的，故结果比正确的和数小6，也是错误的，需加6修正。,如，计算1829？,0001 1000,)0010 1001,0100 0001低位向高位产生进位,)0110加6修正,0100 0111和数是47,实现8421 码加减法运算的加法器是在二进制加法器的基础上，增加一些逻辑电路，根据是否有进位或借位，以及和是否大于9等条件决定是否要进行修正。,也可预先在被加数的各位上加6，然后再与加数相加。若本位有进位，则结果正确，否则再减去6就得到正确结果。这样就不需判断和是否大于9。,35,（2）余3码的加法运算,余3码的每个代码都比对应的8421码多0011。若一位十进制数的8421 码为,X，,则该数的余3码,YX0011。,两个一位的余三码数相加，若没有进位，和,SY,1,Y,2,X,1,0011X,2,00110011（X,1,X,2,0011）,即和数比正确的余3码数多了0011。故应将多出的0011减去。,如，计算15？,0100,)1000,1100无进位,)0011减3修正,1001 和是6,36,若两个余3码数相加产生进位，则应加3修正。,如，计算1618？,0100 1001,)0100 1011,1001 0100,)0011低位加3修正,)0011高位减3修正,0110 0111和是34,37,Homework,3-21，22，,The IEEE has standardized the computer representation for binary floating-point numbers in IEEE 754.This standard is followed by almost all modern machines.,Single precision,called float in the C language family,and real or real*4 in Fortran.This is a binary format that occupies 32 bits and its,significand,has a precision of 24 bits(about 7 decimal digits).,Double precision,called double in the C language family,and double precision or real*8 in Fortran.This is a binary format that occupies 64 bits(8 bytes)and its,significand,has a precision of 53 bits(about 16 decimal digits).,下次课有小测验（第3章）,设计性大作业,1,请在第,4,周末交,38,